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Researchers Submit Patent Application, "Semiconductor Structure and Manufacturing Method of the Same", for Approval

May 28, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- From Washington, D.C., VerticalNews journalists report that a patent application by the inventors Lai, Erh-Kun (Taichung City, TW); Shih, Yen-Hao (New Taipei City, TW); Tsai, Shih-Chang (Hsinchu County, TW), filed on November 7, 2012, was made available online on May 15, 2014.

The patent's assignee is Macronix International Co., Ltd.

News editors obtained the following quote from the background information supplied by the inventors: "The disclosure relates in general to a semiconductor structure and a manufacturing method of the same, and more particularly to a semiconductor structure and a manufacturing method of the same for a memory device.

"In recent years, the structures of semiconductor devices have been changed constantly, and the storage capacity of the devices has been increased continuously. Memory devices are used in storage elements for many products such as MP3 players, digital cameras, computer files, etc. As the application increases, the demand for memory devices focuses on small sizes and large memory capacities. However, as the size of memory devices is reduced, the feature sizes of memory cells are decreased as well, causing a decrease in reliability of memory devices. As such, it is desirable to develop memory devices with improved reliability."

As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "The invention is directed to a semiconductor structure and a manufacturing method of the same, which can be used in memory devices. In the semiconductor structure, each of conductive damascene structures is formed independently on two sides of a stacked structure by a damascene process, such that the conductive damascene structures are perfectly separated from one another, there would be no residual conductive materials between the conductive damascene structures, thus, a good insulation between the conductive damascene structures is achieved, and the reliability of memory devices can be improved.

"According to one embodiment of the present disclosure, a semiconductor structure is provided. The semiconductor structure comprises a stacked structure, a plurality of first conductive blocks, a plurality of first conductive layers, a plurality of second conductive layers, and a plurality of conductive damascene structures. The stacked structure is formed on a substrate, wherein the stacked structure comprises a plurality of conductive strips and a plurality of insulating strips, and the conductive strips and the insulating strips are interlaced. The first conductive blocks are formed on the stacked structure. The first conductive layers and the second conductive layers are formed on two sidewalls of the stacked structure, respectively. The conductive damascene structures are formed on two sides of the stacked structure, wherein each of the first conductive blocks is electrically connected to each of the conductive damascene structures via each of the first conductive strips and each of the second conductive strips.

"According to one embodiment of the present disclosure, a method of manufacturing a semiconductor structure is provided. The method comprises the following steps. A stacked structure is formed on a substrate, wherein a plurality of conductive strips and a plurality of insulating strips are formed, and the conductive strips and the insulating strips are interlaced. A plurality of first conductive blocks is formed on the stacked structure. A plurality of first conductive layers and a plurality of second conductive layers are formed on two sidewalls of the stacked structure, respectively. A plurality of conductive damascene structures is formed on two sides of the stacked structure, wherein each of the first conductive blocks is electrically connected to each of the conductive damascene structures via each of the first conductive strips and each of the second conductive strips.

"The disclosure will become apparent from the following detailed description of the preferred but non-limiting embodiments. The following description is made with reference to the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

"FIG. 1A shows a top view of a semiconductor structure according to an embodiment of the present disclosure.

"FIG. 1B show a cross-sectional view along the section line 1B-1B' in FIG. 1A.

"FIGS. 1C-1D show cross-sectional views along the section line 1C-1C' in FIG. 1A.

"FIGS. 2A-21 illustrate a process for manufacturing a semiconductor structure according to one embodiment of the present disclosure."

For additional information on this patent application, see: Lai, Erh-Kun; Shih, Yen-Hao; Tsai, Shih-Chang. Semiconductor Structure and Manufacturing Method of the Same. Filed November 7, 2012 and posted May 15, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=5278&p=106&f=G&l=50&d=PG01&S1=20140508.PD.&OS=PD/20140508&RS=PD/20140508

Keywords for this news article include: Electronics, Semiconductor, Macronix International Co. Ltd..

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Source: Electronics Newsweekly


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