News Column

"Method for Forming a Device Having Nanopillar and Cap Structures" in Patent Application Approval Process

May 22, 2014



By a News Reporter-Staff News Editor at Politics & Government Week -- A patent application by the inventors Burke, Robert A. (Rockville, MD); Edelstein, Alan S. (Alexandria, VA), filed on October 25, 2012, was made available online on May 8, 2014, according to news reporting originating from Washington, D.C., by VerticalNews correspondents.

This patent application is assigned to U.S. Army Research Laboratory ATTN: RDRL-LOC-I.

The following quote was obtained by the news editors from the background information supplied by the inventors: "Certain electronic devices, such as STT RAM, require that a plurality of rings of a magnetoresistive stack be deposited on a substrate. These rings have been previously formed by ion beam milling which creates the center hole for the ring. Ion beam milling, however, suffers from a number of disadvantages.

"One disadvantage of the ion beam milling is that the process is serial and, for that reason, very slow in manufacturing time. Such ion beam milling also leads to the redeposition of the magnetic tunnel junction material on the nanoring surface which leads to shorting of the device.

"Another process that is currently used to create the rings of magnetoresistive material on the substrate for STT RAM involves the reactive ion etching of the magnetic tunnel junction. In this method, methanol is used to assist with the etching process. A primary disadvantage of this process, however, is that it is only possible to etch 20-30 nm in the vertical direction with this process. With an STT RAM application, however, that is insufficient.

"A final process that is currently used to form the rings of magnetoresistive material for STT RAM involves the use of polystyrene nanospheres. In particular, it has been shown that it is possible to define the center hole of the nanoring using an ordered array of nanospheres. However, in practice it has proven difficult to obtain an ordered array on a large-scale area. Instead, the nanospheres tend to be arranged in a hexagonal array that is less than ideal for forming the contacts involving random access memory, such as STT RAM."

In addition to the background information obtained for this patent application, VerticalNews journalists also obtained the inventors' summary information for this patent application: "The present invention provides a method for forming nanopillar and cap structures on a substrate that is particularly useful for manufacturing STT RAM. However, the method of the present invention may also be used for other types of products such as membranes, filters, and other ring-shaped devices.

"In brief, in a first embodiment of the invention, a substrate is spin coated with a negative resist having a high exposure dose to electron beam radiation. After the first negative resist is baked, a negative resist having a low exposure dose to electron beam radiation is spin coated on top of the first negative resist and baked.

"Thereafter, electron beam lithography at a high level dose is performed in the areas of the nanopillar to expose the first negative resist. Electron beam lithography is then performed at a low dose in the areas of the caps to expose the second negative resist. Thereafter, both the first and second negative resists are developed so that the bilayer resist structure forms both the nanopillar as well as the cap on top of the nanopillar that is greater in cross-sectional area than the nanopillar.

"In an alternative embodiment of the invention, a substrate is spin coated with a positive resist having a low exposure dose to electron beam radiation. After the first positive resist is baked, a positive resist having a high exposure dose to electron beam radiation is spin coated on top of the first positive resist and baked.

"Thereafter, electron beam lithography at a high level dose is performed in the areas between the caps of each of the structures to expose both layers of positive resist. Electron beam lithography is then performed at a low dose in the areas of the cap where the nanopillar is not present. Thereafter, both the first and second positive resists are developed so that the bilayer resist structure forms both the nanopillar as well as the cap on top of the nanopillar that is greater in cross-sectional area than the nanopillar.

"Once the nanopillar and cap structures are formed on the substrate, STT RAM may then be produced by first depositing a tunneling magnetoresistive stack over the caps and exposed areas of the substrate. A sidewall spacer is then formed on top of each cap wherein each sidewall spacer has a portion that extends laterally outwardly from its associated cap so that the nanoring is defined between the outer periphery of the sidewall spacer and the nanopillar.

"Thereafter, the tunneling magnetoresistive stack is etched so that only the portions of the tunneling magnetoresistive stack covered by the sidewall spacer and around the nanopillar remain. The sidewall spacers are then removed in any conventional way, such as a chemical etch, and a dielectric layer is then deposited over the remaining portions of the tunneling magnetoresistive stack. After planarizing via micromachining, the electrical contact for the nanoring is then deposited on top of the insulating material covering the nanoring.

"In an alternative embodiment of the invention, the substrate is covered with a layer of first positive resist and second positive resist, thus forming a bilayer resist structure. Thereafter, electron beam lithography is performed at a high level dose in the areas of the nanopillar to expose both layers of positive resist. Electron beam lithography is carried out at a low exposure dose in the areas of the cap in order to expose the second positive resist. The positive resists are then developed thus removing the exposed areas and leaving a template for the nanopillar and cap structure.

"Thereafter, a material, such as silicon or silicon dioxide, is deposited on the substrate so that the deposited material forms both the nanopillar and its associated cap. Thereafter, the device, such as an STT RAM device, is manufactured in the same fashion as the first embodiment of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

"A better understanding of the present invention will be had upon reference to the following detailed description when read in conjunction with the accompanying drawing, wherein like reference characters refer to like parts throughout the several views, and in which:

"FIG. 1 is a side view illustrating an initial step of the method of the present invention;

"FIG. 2 is a view similar to FIG. 1, but illustrating a subsequent step;

"FIG. 3 is a view similar to FIG. 2, but illustrating a subsequent step;

"FIG. 4 is a view similar to FIG. 3, but illustrating a subsequent step of the method of the present invention;

"FIG. 5 is a view illustrating an initial step in the manufacture of an STT RAM device using the substrate and nanopillar and cap structure of FIG. 4;

"FIG. 6 is a view similar to FIG. 5, but illustrating a subsequent step thereof;

"FIG. 7 is a view similar to FIG. 6, but illustrating a subsequent step thereof;

"FIG. 8 is a side view of the completed device;

"FIG. 9 is a top view of the completed device;

"FIG. 10 is a view similar to FIG. 3, but illustrating a second preferred embodiment of the present invention;

"FIG. 11 is a view similar to FIG. 10, but illustrating a subsequent step thereof;

"FIG. 12 is a view similar to FIG. 11, but illustrating a subsequent step thereof;

"FIG. 13 view similar to FIG. 12, but illustrating a subsequent step thereof."

URL and more information on this patent application, see: Burke, Robert A.; Edelstein, Alan S. Method for Forming a Device Having Nanopillar and Cap Structures. Filed October 25, 2012 and posted May 8, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=6377&p=128&f=G&l=50&d=PG01&S1=20140501.PD.&OS=PD/20140501&RS=PD/20140501

Keywords for this news article include: Nanopillar, Nanotechnology, Emerging Technologies, Electron Beam Lithography, U.S. Army Research Laboratory ATTN: RDRL-LOC-I.

Our reports deliver fact-based news of research and discoveries from around the world. Copyright 2014, NewsRx LLC


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Source: Politics & Government Week


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