News Column

Patent Issued for Testing Fuse Configurations in Semiconductor Devices

May 21, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- According to news reporting originating from Alexandria, Virginia, by VerticalNews journalists, a patent by the inventors Ong, Adrian E. (Pleasanton, CA); Fuller, Paul (Ketchum, ID); Heel, Nick van (Eagle, ID); Thomann, Mark (Boise, ID), filed on August 9, 2011, was published online on May 6, 2014.

The assignee for this patent, patent number 8717052, is Rambus Inc. (Sunnyvale, CA).

Reporters obtained the following quote from the background information supplied by the inventors: "The present invention relates to semiconductor devices, and in particular, testing fuse configurations in semiconductor devices.

"A semiconductor device includes one or more integrated circuit (IC) devices, each of which includes many miniaturized circuits implemented in a single semiconductor substrate, commonly referred to as a 'chip.' The IC devices are typically tested before they are used in order to ensure their proper operation. The IC devices can be tested in a limited fashion using built-in self test (BIST) circuitry that is implemented within the IC devices themselves. BIST testing however, is often incomplete and does not test all aspects of the device operation. Thorough testing of an IC device is traditionally accomplished with complex external testing equipment that typically requires many dedicated input/output (I/O) leads for allowing the test equipment to input various test patterns, codes, and data, and to stress the circuitry of the IC device. The use of the external testing equipment can be particularly difficult if multiple IC devices are combined within a single package that has a limited number of input/output leads, and a thorough test is required for one or more of the devices within the package.

"Some IC devices include fuses that can be selectively and permanently 'blown,' for example, by laser to optimize or fine tune certain electric or other operational parameters of particular device elements such as voltage regulators or delay elements. To find the optimal values of those electric or other operational parameters, such IC devices are traditionally tested for multiple fuse configurations in which different fuses are blown. Because the fuses are permanently blown in each of the different configurations, the traditional test requires different IC devices to implement different fuse configurations."

In addition to obtaining background information on this patent, VerticalNews editors also obtained the inventors' summary information for this patent: "An IC device includes one or more fuses and, for each fuse, a respective 'soft-blow' circuit that can be programmed to simulate electric conditions in which the corresponding fuse is blown. By appropriately programming the soft-blow circuits, multiple fuse configurations can be tested in the same IC device without permanently blowing any of the fuses. Once the optimal fuse configuration has been found, the corresponding fuses can be permanently blown, for example, by laser.

"In general, in one aspect, the present invention provides a semiconductor device that includes one or more external terminals configured to receive fuse configuration data from an external source. The semiconductor device also includes a soft-blow circuit to generate a soft-blow signal based on the fuse configuration data, and a fuse circuit that includes a fuse and has first and second operational states corresponding to the fuse being intact and blown, respectively. The fuse circuit is configured to receive the soft-blow signal and to select its operational state to be the first or second operational state based on the received soft-blow signal.

"Particular implementations can include one or more of the following features. The soft-blow circuit can include a latch to receive and hold a portion of the fuse configuration data. The semiconductor device can also include one or more external terminals that are configured to receive mode selection signals to select between a test mode and a normal mode of operation for the device. Generating the soft-blow signal can be enabled in the test mode and disabled in the normal mode. Receiving the fuse configuration data can be disabled in the normal mode. The mode selection signals can define a programming phase of the test mode, and receiving the fuse configuration data can be enabled only during the programming phase. The soft-blow circuit can receive a data enable signal that enables receiving the fuse configuration data. The fuse circuit can generate an output signal that is different in the first operational state from that in the second operational state. The semiconductor device can also include a voltage generator coupled to the fuse circuit to generate a reference voltage that is different in the first operational state of the fuse circuit from that in the second operational state. Alternatively or in addition, the semiconductor device can include a delay element coupled to the fuse circuit and configured to receive an input signal and to output a delayed signal following the input signal by a time delay that is different in the first operational state of the fuse circuit from that in the second operational state. The fuse circuit can be configured (i) to generate an internal fuse signal based on the fuse being intact or blown, (ii) to combine the internal fuse signal and the received soft-blow signal, and (iii) to select its operational state to be the first or second operational state based on the combined signal. The fuse circuit can include one or more additional fuses and have additional operational states that correspond to one or more of the additional fuses being blown, and wherein the soft-blow circuit generates one or more additional soft-blow signals based on the fuse configuration data, and wherein the fuse circuit is configured to select its operational state to be one of the additional operational states based on the additional soft-blow signals. The soft-blow circuit can receive the fuse configuration data on parallel data lines, and each data line can correspond to a respective fuse in the fuse circuit. Or, the soft-blow circuit can receive the fuse configuration data for two or more fuses using a serial communication line.

"In general, in another aspect, the present invention provides an integrated circuit device packaged in a semiconductor device package. The integrated circuit device includes one or more external terminals configured to receive mode selection signals selecting between a test mode and a normal mode of operation for the device, and one or more external terminals configured in the test mode to receive fuse configuration data from an external source. The device also includes a latch array and a fuse array circuit. The latch array includes a plurality of latches each of which being configured in the test mode to receive a corresponding data portion of the fuse configuration data and to output a respective soft-blow signal based on the received data portion. The fuse array circuit includes a plurality of fuses and generates a respective output signal for each fuse based on whether that fuse is blown or not, wherein each latch in the latch array corresponds to a respective fuse in the fuse array circuits, and in the test mode the fuse array circuit receives the respective soft-blow signal from each latch and generates the respective output signal for that fuse based on the received soft-blow signal.

"Particular implementations can include one or more of the following features. The device can include a circuit element that receives one or more of the output signals from the fuse array circuit and selects its operational state based on the received output signals. The circuit element can include a voltage regulator providing a reference voltage whose value depends on the output signals from the fuse array circuit. Or the circuit element can include a delay element configured to receive an input signal and to output a delayed signal following the input signal by a time delay whose value depends on the output signals from the fuse array circuit.

"In general, in yet another aspect, the present invention provides a method for operating a semiconductor device in a semiconductor device package. The method includes receiving fuse configuration data from an external source, generating a soft-blow signal based on the received fuse configuration data, receiving the soft-blow signal in a fuse circuit that includes a fuse and has first and second operational states corresponding to the fuse being intact and blown, respectively, and selecting the fuse circuit's operational state to be the first or second operational state based on the received soft-blow signal.

"Particular implementations can include one or more of the following features. The method can include generating a tune signal in accordance with the fuse circuit's operational state, and transmitting the tune signal to a circuit element to tune operational parameters of that circuit element, wherein the circuit element can include a voltage regulator or a signal delay element.

"In general, in yet another aspect, the present invention provides a method for testing semiconductor devices. The method includes putting a semiconductor device into a test mode, wherein the semiconductor device includes a set of fuses, and testing the semiconductor device for a plurality of fuse configurations without permanently blowing the fuses, wherein each fuse configuration corresponds to a respective subset of blown fuses within the set of fuses.

"Particular implementations can include one or more of the following features. Testing the semiconductor device for a plurality of fuse configurations can include, for each fuse configuration, loading fuse configuration data into a soft-blow circuit of the semiconductor device, wherein the fuse configuration data defines the respective subset of blown fuses within the set of fuses. Operational parameters can be measured in each fuse configuration, and an optimal fuse configuration can be determined based on the measured operational parameters.

"Particular embodiments can be implemented to realize one or more of the following advantages. An IC device can include soft-blow circuits that can be programmed to test a large number of different fuse configurations. Thus, an optimal fuse configuration can be found without permanently blowing the fuses. The optimal fuse configuration can be found without using and, after the test, discarding many IC devices. Using a single IC device for the test can also decrease inaccuracies resulting from the potentially different set-up for the many IC devices. A software program can test many different (potentially all) combinations and permutations of 'blown' fuses on a single die in one probe touch down. Based on the test results, the appropriate fuse configuration can be selected to obtain a desired result. Such 'soft blow' tests eliminate the need of physically blowing each fuse on a die and using multiple dice for the different fuse configurations. The 'soft-blow' techniques can be used to characterize different combinations and permutations of the fuse configurations on each die that is from the same wafer but at different locations on that wafer; thus one can record or study deviations from the optimal 'uniformess' of the wafer process. Based on such deviation record, the actual fuses can be blown selectively based on their location on the wafer to give uniform results for each die on the wafer. Thus, each die can be adjusted to behave substantially the same way (e.g., to achieve uniform voltage outputs or timing specifications) by adjusting internal voltage levels and delay elements.

"The soft-fuse techniques can also be used to adjust setup and hold times, timing skews, jitter (e.g., in DLL circuits), output drive strengths, oscillator frequencies (e.g., to control self-refresh period), voltage biasing and regulation circuits. The soft-fuse techniques can be implemented 'on the fly' during production. Such on-the-fly soft-fuse testing can be implemented with relatively small impact to the through-put of the production. Further technical advantages are readily apparent to one skilled in the art from the following figures, descriptions, and claims."

For more information, see this patent: Ong, Adrian E.; Fuller, Paul; Heel, Nick van; Thomann, Mark. Testing Fuse Configurations in Semiconductor Devices. U.S. Patent Number 8717052, filed August 9, 2011, and published online on May 6, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=69&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=3423&f=G&l=50&co1=AND&d=PTXT&s1=20140506.PD.&OS=ISD/20140506&RS=ISD/20140506

Keywords for this news article include: Electronics, Rambus Inc., Semiconductor.

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Source: Electronics Newsweekly


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