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Patent Issued for Stacked Semiconductor Package Including Connections Electrically Connecting First and Second Semiconductor Packages

May 21, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- A patent by the inventors Kwon, Heung-kyu (Seongnam-si, KR); Lee, Su-chang (Seoul, KR), filed on August 19, 2013, was published online on May 6, 2014, according to news reporting originating from Alexandria, Virginia, by VerticalNews correspondents.

Patent number 8716872 is assigned to Samsung Electronics Co., Ltd. (Suwon-si, Gyeonggi-do, KR).

The following quote was obtained by the news editors from the background information supplied by the inventors: "The inventive concept relates to semiconductor devices. More particularly, the inventive concept relates to stacked types of semiconductor packages and to methods of manufacturing stacked types of semiconductor package.

"The smaller and more compact and more functional many of today's electronic devices are, the more popular they tend to be. Thus, there is a growing demand for smaller, thinner, and lighter semiconductor packages and for semiconductor chips that have higher capacities, such as data storage capacities, within a given amount of space. However, there are limitations as to how much capacity a semiconductor chip may have within a certain amount of space. Accordingly, stacked semiconductor packages comprising stacked semiconductor chips or stacked semiconductor chip packages (e.g., package on package or POPs) are being actively developed."

In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "According to an aspect of the inventive concept, there is provided a stacked semiconductor package comprising a first semiconductor package, a second semiconductor package, and a plurality of connections electrically connecting the first semiconductor package and the second semiconductor package and at least some of which have different heights. The first semiconductor package includes a first package substrate and a first semiconductor chip mounted on the first package substrate. The first package substrate has lateral first and second sides constituting the outer peripheral region thereof and of which the first side is longer than the second side. The second semiconductor package includes a second package substrate and a second semiconductor chip mounted on the second package substrate. The connections are disposed outside the first semiconductor chip along an outer peripheral region of the first package substrate which includes the first and second sides. A first group of the connections is disposed along the longer first side of the first package substrate as spaced from one another along the longer first side, and the heights of these connections vary from a central to an outer region of the longer first side.

"According to another aspect of the inventive concept, there is provided a semiconductor device comprising a mother board, a plurality of external contact electrodes disposed on the mother board, a first semiconductor package, a second semiconductor package, and connections electrically connecting the first and second semiconductor packages and at least some of which have different heights. The first semiconductor package includes a first package substrate and a first semiconductor chip mounted on the first package substrate. The first package substrate has lateral first and second sides constituting the outer peripheral region thereof and of which the first side is longer than the second side. The second semiconductor package includes a second package substrate and a second semiconductor chip mounted on the second package substrate. The connections are disposed outside the first semiconductor chip along an outer peripheral region of the first package substrate which includes the first and second sides. A first group of the connections is disposed along the longer first side of the first package substrate as spaced from one another along the longer first side, and the heights of these connections vary from a central to an outer region of the longer first side.

"According to another aspect of the present invention, there is provided a method of fabricating a stacked semiconductor package, the method including: providing a first semiconductor package including a first package substrate and a first semiconductor chip mounted on the first package substrate; providing a second semiconductor package including a second package substrate and a second semiconductor chip mounted on the second package substrate; forming a plurality of connection portions between an outer region of a top surface of the first package substrate outside the semiconductor chip and a region of the second package substrate corresponding to the outer region, wherein from among the connection portions, heights of connection portions disposed along a longer side of the first package substrate are gradually changed from a center to an outer region of the longer side; and heat treating the connection portions to stack the second semiconductor package on the first semiconductor package.

"A method of fabricating a stacked semiconductor package, the method comprising: providing a first semiconductor package including a first package substrate and a first semiconductor chip mounted on the first package substrate, providing a second semiconductor package including a second package substrate and a second semiconductor chip mounted on the second package substrate, forming a stack in which the first and second semiconductor packages are juxtaposed with a top surface of the first package substrate facing a bottom surface of the second package substrate, and providing a plurality of connections at least some of which have different heights between an outer region of the top surface of the first package substrate outside the first semiconductor chip and a region of the bottom surface of the second package substrate aligned with the outer region in the stack, and subsequently heat treating the connections to fix the second semiconductor package to the first semiconductor package. Specifically, a first group of the connections are provided along the longer first side of the first package substrate as spaced from one another along the longer first side, and connections of the first group are formed of different heights varying from a central to an outer region of the longer first side of the first package substrate."

URL and more information on this patent, see: Kwon, Heung-kyu; Lee, Su-chang. Stacked Semiconductor Package Including Connections Electrically Connecting First and Second Semiconductor Packages. U.S. Patent Number 8716872, filed August 19, 2013, and published online on May 6, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=73&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=3602&f=G&l=50&co1=AND&d=PTXT&s1=20140506.PD.&OS=ISD/20140506&RS=ISD/20140506

Keywords for this news article include: Semiconductor, Samsung Electronics Co. Ltd..

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Source: Electronics Newsweekly