Patent number 8705289 is assigned to
The following quote was obtained by the news editors from the background information supplied by the inventors: "The invention generally relates to a flash memory apparatus, in particular, to a flash memory apparatus with a voltage boost circuit.
"Nowadays, memories could be classified into volatile memories and non-volatile memories. A volatile memory, for example, a dynamic random access memory (DRAM) has an advantage of fast programming and reading. Nevertheless, the volatile memory only operates when power is applied to the flash memory. On the other hand, although a non-volatile memory e.g. a flash memory operates slowly while programming and reading, the flash memory retains information inside for a long time even when there is no power applied to the flash memory.
"Generally for operation of a flash memory, while programming or erasing, a specific voltage is required for injecting charges into the floating gate of the flash memory or drawing charges out of the floating gate of the flash memory. Therefore, a charge-pump circuit or a voltage generation circuit is usually needed for operating the flash memory. Hence, the voltage generation circuit of the flash memory circuit plays an important role in the operation of the flash memory."
In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "Accordingly, the present invention is directed to a flash memory apparatus, and further to a flash memory with low operation voltage and low power consumption.
"The present invention is directed to a flash memory apparatus. The flash memory apparatus includes a plurality of memory cells and a plurality of programming control voltage generators wherein each of memory cells receives a programming control voltage through a control end point and executes data programming operation according to the programming control voltage. The programming control voltage generators are respectively coupled to the memory cells. Each of the programming control voltage generators includes a pre-charge voltage transmitter and a pumping capacitor. The pre-charge voltage transmitter is coupled to the control end point of each of the memory cells. The pre-charge voltage transmitter applies the pre-charge voltage to the control end point of the corresponding memory cell according to a pre-charge enable signal during a first period of time. Besides, the pumping capacitor is coupled between the control end point of each of the memory cells and a pumping voltage. The pumping voltage is applied to the pumping capacitor during a second period of time, and generates the programming control voltage for programming at the control end points of the memory cells.
"According to an embodiment of the present invention, the flash memory apparatus further includes a plurality of erasing control voltage generators. Each of the erasing control voltage generators includes an erasing pre-charge voltage transmitter and an erasing pumping capacitor. The erasing pre-charge voltage transmitter is coupled to the erase end point of each of the memory cells. The erasing pre-charge voltage transmitter applies an erasing pre-charge voltage to the erase end point of the corresponding memory cell according to an erasing pre-charge enable signal during a third period of time. The erasing pumping capacitor is coupled between the erase end point of each of the memory cells and an erasing pumping voltage. The erasing pumping voltage is applied to the erasing pumping capacitor during a fourth period of time, and generates an erasing control voltage for erasing at the erase end points of the memory cells.
"As described above, the present invention provides a flash memory apparatus. The flash memory apparatus transmits outside pre-charge voltages to the control or erase end points of the memory cells through pre-charge voltage transmitters, and boosts the pre-charge voltages received by the control or erase end points of the memory cells to the programming or erasing control voltages for operating the flash memory apparatus. The pre-charge voltages applied from the exterior of the apparatus will be lowered and the power consumption that the exterior of the apparatus supplying the pre-charge voltages will be reduced."
URL and more information on this patent, see: Yang, Ching-Sung; Ching, Wen-Hao; Ku, Wei-Ming; Chen, Yung-Hsiang; Wang, Shih-Chen; Chen, Hsin-Ming. Flash Memory Apparatus with Programming Voltage Control Generators. U.S. Patent Number 8705289, filed
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