The patent's inventor is
This patent was filed on
From the background information supplied by the inventors, news correspondents obtained the following quote: "There have been widely used switching power supply units having an integrated semiconductor circuit that includes a switching element (e.g. transistor switch) and a drive circuit controlling the switching element to control the output voltage of the switching power supply unit.
"FIG. 3 shows a circuit arrangement of a conventional switching power supply unit, in which a semiconductor integrated circuit (IC) 10 has a transistor switch Qo and a drive circuit 20 for driving the transistor switch Qo. This transistor switch Qo is directly connected in series to a coil Lo via a pad Po of the IC 10. The voltage appearing at the node of the pad Po and the coil Lo is rectified and smoothed by a diode Do and a capacitor Co to provide a dc output voltage Vout.
"As the transistor switch Qo is turned on, switching current Io is supplied from a power supply (e.g. a battery) having an input voltage Vin to the transistor switch Qo via the coil Lo and the pad Po, and the transistor switch Qo. The current Io grows larger with time after the transistor switch Qo is turned on. If the transistor switch Qo is turned off, the energy accumulated in the coil Lo is liberated therefrom, which is rectified and smoothed by the diode Do and the capacitor Co before it is provided as the output voltage Vout of the power supply unit, converted from the input voltage Vin.
"The magnitude of the output voltage Vout is determined by the duty ratio Ton/(Ton+Toff) of ON time Ton to OFF time Toff of the transistor switch Qo. Usually, the duty ratio is controlled by feeding the drive circuit 20 a feedback voltage indicative of the output voltage Vout in such a way that the feedback voltage equilibrate with a predetermined reference voltage, thereby holding the output voltage Vout at a predetermined level.
"There is a combined resistance Rp for the pad and the bonding wire connected thereto that arises from the resistances of the pad Po and the bonding wires and the contact resistance therebetween. In FIG. 3, the combined resistance Rp is shown in parentheses. A voltage drop caused by the combined resistance Rp will result in an electric power loss determined by Rp and Io.
"In order to reduce the voltage drop due to the combined resistance Rp, multiple bonding wires can be parallelly connected to the terminal (see, for example, Japanese Patent Applications Laid Open No. H7-202097 and No. 2000-114307).
"A wafer-level chip-sized package (WL-CSP) type IC has been increasingly adopted for miniaturization of the IC. A WL-CSP type IC has pluralities of ball-shaped terminals (hereinafter referred to as ball terminals) arranged in a two-dimensional grid array structure (the terminals in the structure referred to as ball grid array (BGA) terminals) to establish electric connections with external circuits. Each of the ball terminals is made very small in order to attain a high terminal density in the IC package.
"It is therefore difficult to connect a multiplicity of bonding wires in parallel to a ball terminal of the BGA structure as shown in the above cited references. Moreover, since the ball terminals are arranged in the lattice structure, it is also difficult to make a particular terminal, such as one connected to a transistor switch, larger than other terminals.
"It is noted that the current Io has a comparatively large magnitude since it pertains to the switching of a transistor switch, so that it can exceed the withstand current level (or permissible current level) of one ball terminal. The ball terminal connected to a semiconductor switch generates heat determined by the contact resistance thereof and the current Io. As a consequence, these ball terminals connected to a transistor switch are in jeopardy of being melt down by heat."
Supplementing the background information on this patent, VerticalNews reporters also obtained the inventor's summary information for this patent: "It is therefore an object of the present invention to provide a semiconductor device equipped with a built-in switch circuit and a drive circuit therefor and having pluralities of grid array terminals forming a grid array structure such as a BGA structure, wherein the multiple terminals to which the switch circuit is connected are adapted to generate only a small amount of heat, thereby decreasing the possibility of hazardous melting of the terminals.
"It is another object of the invention to provide a power supply unit having improved conversion efficiency, utilizing such semiconductor device as stated above.
"In accordance with one aspect of the invention, there is provided a semiconductor device equipped with a switch circuit and a drive circuit for performing ON-OFF control of the switch circuit and having grid array terminals forming a grid array structure, wherein the output end of the switch circuit is connected to multiple terminals of the grid array structure. These multiple terminals may be called as switching output terminals.
"Each pair of nearest neighbors of the multiple terminals may be provided therebetween with at least one interposing terminal other than the multiple terminals.
"No or only a small amount of current flows through said at least one interposing terminal as compared with the current that flows through the switch circuit.
"The multiple terminals may be all located at the outermost peripheral terminal positions of the grid array structure.
"The switch circuit may consist of a multiplicity of transistor switches connected in parallel with one another so as to be simultaneously turned on and off.
"Each of the grid array terminals may be a ball-shaped terminal.
"In accordance with another aspect of the invention, there is provided a power supply unit equipped with a semiconductor device that includes a switch circuit and a drive circuit for performing ON-OFF control of the switch circuit and has grid array terminals forming a grid array structure, wherein
"the output end of the switch circuit is connected to multiple terminals of the grid array structure;
"the multiple terminals are connected with one another outside the semiconductor device; and
"the power supply unit is adapted to convert its input voltage into an output voltage under the ON-OFF control of the switch circuit.
"In an inventive semiconductor device having a built-in switch circuit and a grid array terminal structure such as a BGA structure, the output end of the switch circuit is connected to multiple terminals of the grid array structure. In this arrangement, current that flows through any one grid array terminal is reduced to or less than a permissible level, so that Joule heat due to the contact resistance between the terminal and an IC socket is reduced, thereby suppressing hazardous melting of the grid array terminals.
"Moreover, since the switching current is shunted to multiple terminals, the power loss that takes place in each terminal and its surrounding is reduced accordingly, which provides an improved conversion efficiency to the power supply unit.
"Since each pair of nearest neighbors of the multiple terminals is provided with at least one interposing terminal through which no or little current flows, a distributed heat dissipative area is provided for the terminals. Thus, Joule heat is easily dissipated, and temperature rise in these terminals is suppressed. Since all the multiple terminals are located at the outermost peripheral terminal positions of the grid array structure, thicker, and hence less resistive, external wires can be connected to the multiple terminals, which facilitates enhanced heat radiation."
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Keywords for this news article include: Electronics,
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