The patent's assignee is
News editors obtained the following quote from the background information supplied by the inventors: "The disclosure relates to the field of manufacturing a polycrystalline dielectric layer on metal and, more especially, manufacturing a dielectric capacitor layer inserted between two metal electrodes.
"Dielectric layers that have a high dielectric constant have many applications, especially in compact, high-capacitance capacitors.
"The dielectric constant of a dielectric material depends not only on the atoms of which it is made but also on the spatial arrangement of the molecules relative to each other. For example, zirconium oxide (ZrO2) has a dielectric constant equal to 18 in its amorphous form, i.e. a form that has no particular structure, and a dielectric constant of 45 when it has a tetragonal or cubic crystalline structure.
"One way of increasing the capacitance of a capacitor without increasing the volume of its dielectric layer is therefore to produce the latter in a crystalline form.
"The form and final geometry of a crystalline structure depend on the crystal germination conditions and hence on the geometrical and chemical structure of the surface on which it is manufactured. However, crystalline growth of a dielectric material is tricky when growth takes place on metal. In fact, the metal may induce a 'polycrystalline' form of the dielectric material, i.e. a dielectric material that is formed by juxtaposed crystals. The interface between these crystals is usually referred to as the 'grain boundary'.
"The term 'polycrystalline' denotes a material comprising crystals that may be embedded in a matrix of dielectric material that has not crystallized, i.e. an amorphous dielectric material. There are therefore different crystallization rates depending on the total volume of crystals, given that the crystallization rate is defined as the ratio of the volume of crystals to the total volume of material. The dielectric constant of a dielectric material increases as its crystallization rate increases. In practice, a dielectric layer that has the highest possible degree of crystallization is therefore sought after.
"Since a polycrystalline form implies the presence of grain boundaries, grain boundaries that extend through the entire thickness of the dielectric layer are very frequently observed. Such grain boundaries, referred to as 'penetrating grain boundaries' in the rest of this document, constitute preferential leakage paths for electrons and this is extremely detrimental. In the case of a capacitor, in particular, this means that penetrating grain boundaries electrically connect the two electrodes of the capacitor. In addition, it has also been observed that the existence of a penetrating grain boundary substantially reduces the latter's electrical breakdown voltage.
"In order to prevent the occurrence of penetrating grain boundaries, an interlayer made of an amorphous dielectric material is provided in the median plane of the dielectric layer. For example, a dielectric layer with no penetrating grain boundaries comprises a stack formed by a layer of amorphous alumina (Al.sub.2O.sub.3) placed between two layers of polycrystalline ZrO.sub.2. Although the alumina layer prevents the occurrence of penetrating grain boundaries, it nevertheless significantly limits polycrystalline growth of the ZrO.sub.2, thereby lowering the final crystallization rate of the ZrO.sub.2 layers and consequently also reducing the total dielectric constant of the dielectric layer. Thus, with such a structure, the maximum dielectric constant that can be achieved is 20.
"Inserting an amorphous dielectric layer in order to prevent the occurrence of penetrating grain boundaries therefore defeats the first object referred to above, namely obtaining a polycrystalline structure that has the highest possible dielectric constant."
As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventor's summary information for this patent application: "One embodiment of the present disclosure is a method for manufacturing a dielectric layer with a high dielectric constant, having a polycrystalline structure and formed on a metal, which limits, or even prevents, the formation of penetrating grain boundaries.
"One embodiment of the disclosure is a method for manufacturing a capacitor formed by a polycrystalline dielectric layer having a crystallization rate greater than 70 percent and inserted between two metal electrodes with the dielectric layer being formed by polycrystalline growth of a single predetermined dielectric metallic oxide on one of the metal electrodes, wherein said method comprises performing polycrystalline growth cycles forming respective thicknesses of the polycrystalline dielectric layer, and wherein at least one growth condition of the dielectric metallic oxide is modified so as to from one of the growth cycles to a subsequent one of the growth cycles, with crystallization rate variation between thicknesses of the polycrystalline dielectric layer formed by two successive polycrystalline growth cycles being less than 10 percent.
"The 'crystallization rate' is the volume of crystals per unit of volume.
"A 'single dielectric metallic oxide' means an oxide whose stoichiometric ratio is the same in the whole polycrystalline dielectric layer. More particularly, all crystals, or >, are constituted by the same dielectric metallic oxide with a single stoichiometric ratio.
"In other words, the arrangement of the crystals relative to each other and/or their size is also modified by modifying a growth condition of the dielectric layer. More particularly, a new polycrystalline growth begins, that is to say growth of existing crystals is stopped and growth of new crystals begins, the new crystals stacking up the existing crystals.
"Thus, the probability is low of a grain boundary formed through the entire thickness of the polycrystalline dielectric material manufactured by applying the new growth conditions being superposed on a grain boundary formed through the entire thickness of the polycrystalline dielectric material already manufactured by applying the previous growth conditions. If the conditions are modified several times, the probability is virtually zero of there being superposed grain boundaries that ultimately form a penetrating grain boundary.
"Thanks to the disclosure, one can obtain in a simple manner one dielectric layer which is constituted by a single dielectric metallic oxide, which has a great crystallization rate, which is substantially homogenous regarding crystallization rate, and without a through-grain boundary. Such layer has a dielectric constant greater than 35 while being free of current leakage paths.
"Also, it should be noted that the method involves modifying one or more operating parameters while implementing a single growth process.
"One embodiment thus generally concerns a method for manufacturing a capacitor formed by a polycrystalline dielectric layer inserted between two metal electrodes with the dielectric layer being formed by polycrystalline growth of a predetermined dielectric metallic oxide on one of the metal electrodes wherein at least one growth condition of the dielectric oxide is modified during formation of the polycrystalline dielectric layer so as to obtain variation of the polycrystalline properties of the dielectric oxide through the thickness of said layer.
"In one embodiment of the disclosure, the dielectric layer is produced by Plasma Enhanced Atomic Layer Deposition (PEALD) which comprises a succession of elementary deposition cycles, each consisting of a phase in which the metal precursor of the dielectric oxide is fed in and a phase in which a plasma is applied, and the at least one modified polycrystalline growth condition comprises the time for which the metal precursor of the dielectric layer is fed in.
"In another embodiment of the disclosure, the dielectric layer is produced by plasma enhanced atomic layer deposition which comprises a succession of elementary deposition cycles, each including a phase in which the metal precursor of the dielectric oxide is fed in and a phase in which a plasma is applied, and the at least one modified polycrystalline growth condition comprises a condition that relates to a property of the plasma and/or the time for which the plasma is applied. In one embodiment of the disclosure, the, or each, polycrystalline growth condition is modified regularly so as to obtain a succession of strata each having a thickness of less than 5 nanometers and preferably a thickness substantially equal to 1 nanometer.
"In one embodiment of the disclosure the dielectric material is ZrO.sub.2 or HfO.sub.2 or SrTiO.sub.3.
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
"The disclosure and its advantages will be made more readily understandable by the following description which relates to the accompanying drawings in which identical references denote identical or analogous components and in which:
"FIG. 1 is a schematic view of a first example of a PEALD deposition system;
"FIG. 2 is a schematic view of a second example of a PEALD system;
"FIG. 3 is a schematic timing diagram showing the various phases of PEALD in one embodiment of the disclosure; and
"FIG. 4 is a schematic cross-sectional view of a dielectric layer inserted between two metal electrodes and produced according to one embodiment of the disclosure."
For additional information on this patent application, see: Gros-Jean, Mickael. Method for Manufacturing a Polycrystalline Dielectric Layer. Filed
Keywords for this news article include: Nanotechnology, Emerging Technologies, Atomic Layer Deposition,
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