The assignee for this patent, patent number 8637869, is
Reporters obtained the following quote from the background information supplied by the inventors: "(a) Field of the Invention
"The present description relates to a thin film transistor (TFT) array panel for a liquid crystal display (LCD) or an organic light emitting display (OLED), and a manufacturing method for the same.
"(b) Description of the Related Art
"Liquid crystal displays (LCDs) are one of the most widely used flat panel displays. An LCD includes a liquid crystal (LC) layer interposed between two panels provided with field-generating electrodes. The LCD displays images by applying voltages to the field-generating electrodes to generate an electric field in the LC layer that determines orientations of LC molecules therein to adjust the polarization of incident light.
"An LCD including two panels provided with field-generating electrodes respectively, wherein one panel has a plurality of pixel electrodes in a matrix and the other has a common electrode covering the entire surface of the panel, dominates the LCD market.
"The LCD displays images by applying a different voltage to each pixel electrode. For this purpose, thin film transistors (TFTs) having three terminals to switch voltages applied to the pixel electrodes are connected to the pixel electrodes, and gate lines to transmit signals for controlling the thin film transistors and data lines to transmit voltages applied to the pixel electrodes, are formed on a thin film transistor array panel.
"A TFT is a switching element for transmitting image signals from the data line to the pixel electrode in response to the scanning signals from the gate line.
"The TFT is applied to an active matrix organic light emitting display as a switching element for controlling respective light emitting elements.
"Meanwhile, chromium (Cr) is conventionally the dominating material for the gate lines and the data lines of a TFT array panel.
"Considering the trend of LCDs of increasing size, a material having low resistivity is urgently required since the lengths of the gate and data lines increase along with the LCD size. Accordingly, there are limitations to applying Cr to a large size LCD.
"Cu is a well-known substitute for Cr due to its low resistivity. However, the poor adhesiveness of Cu with a glass substrate and the difficulty in etching Cu are obstacles in applying Cu for use with gate and data lines."
In addition to obtaining background information on this patent, VerticalNews editors also obtained the inventors' summary information for this patent: "Accordingly, it would be desirable to solve the above mentioned problems and to provide a thin film transistor array panel that has signal lines having low resistivity and good reliability.
"In accordance with the present invention, a thin film transistor array panel is provided. The thin film transistor array panel comprises an insulating substrate; a gate line formed on the insulating substrate; a gate insulating layer formed on the gate line; a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode being adjacent to the source electrode with a gap therebetween; and a pixel electrode coupled to the drain electrode, wherein at least one of the gate line, the data line, and the drain electrode comprises a first conductive layer comprising a conductive oxide and a second conductive layer comprising copper (Cu).
"Here, the first conductive layer contains at least one material selected from ITO, ITON, IZO, and IZON.
"In accordance with the present invention, a manufacturing method of a thin film transistor array panel is provided. The manufacturing method comprises: forming a gate line having a gate electrode on an insulating substrate; depositing a gate insulating layer and a semiconductor layer on the gate line in sequence; forming a drain electrode and a data line having a source electrode on the gate insulating layer and the semiconductor layer, the drain electrode being adjacent to the source electrode with a gap therebetween; and forming a pixel electrode coupled to the drain electrode, wherein at least one step of the forming the gate line and the forming the data line and drain electrode comprises forming a conductive oxide layer and forming a conductive layer containing Cu.
"At least one step of the forming a gate line and the forming a data line and drain electrode may comprise a step of forming a conductive oxide layer after forming a conductive layer containing Cu.
"The conductive oxide layer may comprise IZO or ITO.
"The step of forming the conductive oxide layer may comprise exposing the conductive oxide layer to a nitrogen-containing gas.
"The step of forming the conductive oxide layer may comprise exposing the conductive oxide material to at least one of hydrogen (H.sub.2) and water vapor (H.sub.2O).
"The step of forming the conductive oxide layer may be performed at a temperature between 25.degree. C. to 150.degree. C."
For more information, see this patent: Lee,
Keywords for this news article include: Electronics, Semiconductor,
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