News Column

Patent Issued for Selectively Inhibit Page Usage Bit Updates

February 13, 2014

By a News Reporter-Staff News Editor at Computer Weekly News -- A patent by the inventor Wilt, Nicholas P. (Rochester, NY), filed on December 15, 2006, was published online on January 28, 2014, according to news reporting originating from Alexandria, Virginia, by VerticalNews correspondents.

Patent number 8639892 is assigned to NVIDIA Corporation (Santa Clara, CA).

The following quote was obtained by the news editors from the background information supplied by the inventors: "The present invention relates generally to memory management and more particularly to a more efficient storage of memory management characteristics for data in memory.

"The amount of data needed by applications running in a computer system has greatly increased the past few years, and the rate of this increase shows no signs of abating. To handle this data, computer systems need to incorporate improved ways to manage data in memory.

"Data stored in memory is typically arranged in pages. These pages are stored at physical addresses in one or more memory devices, for example one or more DRAMs and hard disk drives. A DRAM can only store a limited amount of data, but is able to quickly provide it for use by an application. A hard disk drive stores a great deal of data, but is slower to provide it.

"Access times make DRAM memory the more desirable destination, but space is short. Accordingly, pages that are not needed by an application can be moved from DRAMs to a higher level of memory, such as a hard disk drive. Similarly, when a page is needed but not available in DRAMs--a page fault--the page can be read back from the disk to the DRAM. When pages are swapped in this manner, their physical addresses change.

"It is undesirable and inefficient for applications running on a computer system to keep track of these changing physical addresses. Thus, applications use virtual addresses, which may remain static. Virtual addresses can be translated to physical addresses using a translation lookaside buffer, which includes a number of page table entries. As a page moves, the page table entry is updated.

"Page table entries can be used to store other characteristics of a page as well as its physical address. A virtual memory manager (VMM) can use these characteristics in managing the data in memory. But storage of these characteristics can be complicated, requiring complex software and hardware.

"Moreover, some characteristics do not need to be tracked for some pages. For example, page usage data does not need to be tracked for pages that are not to be swapped to disk. Thus, what is needed are circuits, methods, and apparatus that provide an efficient storage of these characteristics and inhibit their updating in circumstances where updated information is not useful."

In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventor's summary information for this patent: "Accordingly, embodiments of the present invention provide circuits, methods, and apparatus that inhibit the collection or updating of page characteristics where such information is not useful. An exemplary embodiment of the present invention inhibits the updating of page usage information for pages that are to be kept resident in memory and not swapped to disk.

"One such exemplary embodiment of the present invention tracks page usage information using a bit vector. The bit vector uses physical addresses and tracks pages resident in memory. Various embodiments use two bit vectors, where one vector is written to while the other is read from. Sill others use multiple vectors whose entries are accumulated to generate histograms.

"Further embodiments of the present invention inhibit the collection or updating of page usage data where such data is not useful. For example, some pages in memory are to be kept in memory until they are no longer needed, after which they are deleted or overwritten. These pages are not to be stored on the disk. Accordingly, usage data for these pages is not useful and, to conserve resources, its collection or updating is thus inhibited or suppressed. Such pages may include display data in a frame buffer, display data received from an external source, such as video data received externally, or other such data.

"The pages for which page usage or other characteristic updates are to be suppressed can be identified in a number of ways. One exemplary embodiment of the present invention uses a specific range of addresses, where usage data for the pages in the range of addresses is not updated. Another embodiment uses bits in page director entries, while another uses bits in various page table entries. Another embodiment of the present invention uses one or more address registers, where each register identifies a range of addresses for which usage updates are to be inhibited. Yet another embodiment uses one or more segments or context DMAs to identify ranges of addresses for which usage updates are to be inhibited.

"Various embodiments of the present invention may incorporate one or more of these and the other features described herein. A better understanding of the nature and advantages of the present invention may be gained with reference to the following detailed description and the accompanying drawings."

URL and more information on this patent, see: Wilt, Nicholas P.. Selectively Inhibit Page Usage Bit Updates. U.S. Patent Number 8639892, filed December 15, 2006, and published online on January 28, 2014. Patent URL:

Keywords for this news article include: NVIDIA Corporation.

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Source: Computer Weekly News

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