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Patent Application Titled "Lower Semiconductor Molding Die, Semiconductor Package, and Method of Manufacturing the Semiconductor Package" Published...

February 12, 2014



Patent Application Titled "Lower Semiconductor Molding Die, Semiconductor Package, and Method of Manufacturing the Semiconductor Package" Published Online

By a News Reporter-Staff News Editor at Electronics Newsweekly -- According to news reporting originating from Washington, D.C., by VerticalNews journalists, a patent application by the inventors Jang, Jae-Gwon (Suwon-si, KR); Kim, Young-Lyong (Gunpo-si, KR); Jang, Ae-Nee (Gwangjin-gu, KR), filed on March 5, 2013, was made available online on January 30, 2014.

The assignee for this patent application is Samsung Electronics Co., Ltd.

Reporters obtained the following quote from the background information supplied by the inventors: "Exemplary embodiments in accordance with principles of inventive concepts relate to a semiconductor package.

"Semiconductor integrated circuit devices may be assembled with circuit board chips, wire-bonded, encapsulated, and packaged to protect surfaces of the semiconductor device from external moisture and impurities and to dissipate heat from, for example, a bonding portion.

"A semiconductor package may be fabricated by various processes using various members, including a lead frame, a printed circuit board (PCB), and a circuit film, for example. In particular, a semiconductor package may be fabricated using a bonding process, a wire process, and a molding process. In the molding process, a semiconductor molding apparatus may be used, for example, to encapsulate the semiconductor device. Encapsulation of the devices is critical to their performance and a system and method for effective encapsulation is therefore highly desirable."

In addition to obtaining background information on this patent application, VerticalNews editors also obtained the inventors' summary information for this patent application: "An exemplary embodiment of a semiconductor package molding die in accordance with principles of inventive concepts includes a mounting surface configured for receiving a plurality of circuit board chips, each having a through-hole and a plurality of window patterns, each aligned with a through-hole of a circuit board chip, each window pattern extending in a first direction under a corresponding one of the circuit board chips. Each of the window patterns comprises a first passage pattern having a first width and a second passage pattern having a second width different from the first width.

"An exemplary embodiment of a semiconductor package molding die in accordance with principles of inventive concepts is configured for receiving an encapsulant which fills the through-hole and the window patterns.

"An exemplary embodiment of a semiconductor package molding die in accordance with principles of inventive concepts includes a first passage pattern and the second passage pattern that are connected alternately in the first direction.

"An exemplary embodiment of a semiconductor package molding die in accordance with principles of inventive concepts includes a second pattern width is greater than the first width.

"An exemplary embodiment of a semiconductor package molding die in accordance with principles of inventive concepts includes a second passage pattern that is deeper than the first passage pattern.

"An exemplary embodiment of a semiconductor package molding die in accordance with principles of inventive concepts includes a second passage pattern that is longer than the first passage pattern.

"An exemplary embodiment of a semiconductor package molding die in accordance with principles of inventive concepts includes a first passage pattern that is disposed adjacent to an end of each of the circuit board chips, and a second passage pattern is disposed adjacent to a through-hole of each of the circuit board chips.

"An exemplary embodiment of a semiconductor package molding die in accordance with principles of inventive concepts includes window patterns each of which includes a third passage pattern having a third width greater than the second width, wherein a third passage pattern is disposed adjacent to an end of each of the circuit board chips, a second passage pattern is disposed adjacent to the through-hole, and a first passage pattern is disposed between the second passage pattern and the third passage pattern.

"An exemplary embodiment of a semiconductor package in accordance with principles of inventive concepts includes a circuit board chip having a through-hole, a semiconductor device mounted on the circuit board chip, and an encapsulant that encapsulates the semiconductor device, fills the through-hole, extends in a bottom surface of the circuit board chip in a first direction, and comprises a first bottom surface pattern having a first width and a second bottom surface pattern having a second width different from the first width.

"An exemplary embodiment of a semiconductor package in accordance with principles of inventive concepts includes a first bottom surface pattern and a second bottom surface pattern that are connected alternately in a first direction.

"An exemplary embodiment of a semiconductor package in accordance with principles of inventive concepts includes first and second bottom surface patterns of first and second widths, where the second width is greater than the first width.

"An exemplary embodiment of a semiconductor package in accordance with principles of inventive concepts includes a second bottom surface pattern that is thicker than a first bottom surface pattern.

"An exemplary embodiment of a semiconductor package in accordance with principles of inventive concepts includes a second bottom surface pattern that is longer than a first bottom surface pattern.

"An exemplary embodiment of a semiconductor package in accordance with principles of inventive concepts includes a first bottom surface pattern that is disposed adjacent to an end of the circuit board chip, and the second bottom surface pattern is disposed adjacent to the through-hole.

"An exemplary embodiment of a semiconductor package in accordance with principles of inventive concepts includes a third bottom surface pattern having a third width greater than the second width, wherein the third bottom surface pattern is disposed adjacent to both ends of the circuit board chip, the second bottom surface pattern is disposed adjacent to the through-hole, and the first bottom surface pattern is disposed between the second bottom surface pattern and the third bottom surface pattern.

"An exemplary embodiment of a semiconductor package in accordance with principles of inventive concepts includes a circuit board chip having a through-hole, a semiconductor device mounted on the circuit board chip, and an encapsulant. The encapsulant encapsulates the semiconductor device, fills the through-hole and has an external pattern that is the complement of a mold within which the encapsulant was formed. The external pattern on one side of the package reflecting a mold shape that retards the flow of encapsulant material relative to the flow of encapsulant material on the opposite side of the package.

"An exemplary embodiment of a semiconductor package in accordance with principles of inventive concepts includes an external pattern on one side that includes segments having different thicknesses.

"An exemplary embodiment of a semiconductor package in accordance with principles of inventive concepts includes an external pattern on one side that includes segments having different widths.

"An exemplary embodiment of a semiconductor package in accordance with principles of inventive concepts includes an external pattern on one side that includes a thicker segment aligned with the through-hole.

"An exemplary embodiment of a semiconductor package in accordance with principles of inventive concepts includes an external pattern on one side that includes a wider segment aligned with the through-hole.

BRIEF DESCRIPTION OF THE DRAWINGS

"The above and other aspects and features of the present inventive concept will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings, in which:

"FIG. 1 is a cross-sectional view of an exemplary molding apparatus 1 in which a plurality of circuit board chips 100 are placed.

"FIG. 2 is a plan view of a plurality of window patterns 11 of a lower semiconductor molding die 10 in accordance with principles of inventive concepts.

"FIG. 3 is a cross-sectional view of the exemplary molding apparatus 1 during an exemplary molding process.

"FIG. 4 is a plan view showing the flow of an encapsulant in the lower semiconductor molding die 10 during an exemplary molding process.

"FIGS. 5 and 6 are enlarged views of a portion A shown in FIG. 2.

"FIGS. 7, 8A and 9A are cross-sectional views taken along the line B-B of FIG. 2.

"FIGS. 8B and 9B are cross-sectional views taken along the line C-C of FIG. 2.

"FIG. 10 is a cross-sectional view of an exemplary semiconductor package 400 formed by the exemplary molding apparatus 1 of FIG. 1.

"FIG. 11 is a bottom view of the semiconductor package 400 in accordance with principles of inventive concepts.

"FIG. 12 is a bottom view of a semiconductor package 401 in accordance with principles of inventive concepts.

"FIGS. 13A, 14A and 15A are cross-sectional views taken along the line D-D of FIG. 11.

"FIGS. 13B, 14B, and 15B are cross-sectional views taken along the line E-E of FIG. 11.

"FIG. 16 is a flowchart illustrating an exemplary method of fabricating a semiconductor package in accordance with principles of inventive concepts."

For more information, see this patent application: Jang, Jae-Gwon; Kim, Young-Lyong; Jang, Ae-Nee. Lower Semiconductor Molding Die, Semiconductor Package, and Method of Manufacturing the Semiconductor Package. Filed March 5, 2013 and posted January 30, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=4684&p=94&f=G&l=50&d=PG01&S1=20140123.PD.&OS=PD/20140123&RS=PD/20140123

Keywords for this news article include: Circuit Board, Semiconductor, Samsung Electronics Co. Ltd..

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Source: Electronics Newsweekly


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