The patent's assignee for patent number 8654811 is
News editors obtained the following quote from the background information supplied by the inventors: "This invention relates generally to materials integration, hybridization, thermal management, and processing techniques of high-power vertical-cavity surface emitting laser arrays.
"FIG. 1 illustrates a vertical-cavity surface emitting laser (VCSEL) structure of the related art.
"FIG. 1 shows VCSEL 100, with a VCSEL structure 102 on top of a submount 104, which is typically coupled to a heatsink 106. VCSEL structure 102 is typically coupled to submount 104 via solder 108.
"Lower contact 110 is coupled to solder 108, which provides an electrical contact to VCSEL structure 102. Lower mirror 112 is coupled to lower contact 110, and gain region 114 is coupled between lower mirror 112 and upper mirror 116. Upper mirror 116 is coupled to substrate 118, which has upper contacts 120 opposite upper mirror 116.
"In operation, a voltage differential is placed between lower contact 110 and upper contacts 120 to create current flow 122 through gain region 114. Gain region 114 may have constraints or other current restrictions in certain parts of gain region 114 to force current flow 122 into a specific area 124 of gain region 114, which increases the current density in area 124. As current flow 122 increases, photons are generated in gain region 114, and the photons 126 begin traversing the region between upper mirror 116 and lower mirror 112, until photons 126 have generated enough other photons 126 in gain region 114 to overcome loss and create laser emission 128 from the surface of VCSEL structure 102. As such, VCSEL 100 has a lasing optical cavity, i.e., the area 124 between upper mirror 116 and lower mirror 112, that resonates in a direction perpendicular to the plane of the semiconductor surface 130, which is made possible through the gain section 114 being interposed between two high-reflectivity distributed Bragg reflector (DBR) mirrors 112 and 116. Although shown on the top surface 130 in FIG. 1, emission 128 can occur through bottom surface 132 if desired with proper allowances made in the processing.
"Mirrors 116 and 112 are made from various materials, typically AlGaAs/GaAs or SiO2/TiO2 stacks, sometimes with a gold or metallic coating on the side opposite emission 128, and gain region 114 is typically GaAs or a ternary or quaternary of GaAs, e.g., GaAlAs, InGaAs, AlInGaAs etc. Other materials can be used for VCSEL 100 as desired.
"VCSELs 100 are advantageous over edge-emitters in several respects. First, the output emission 128 can be circularly or arbitrarily shaped, which simplifies external coupling optics and increases coupling efficiency into fibers. Second, VCSELs 100 can easily be fabricated into 2D arrays and tested or screened on the substrate wafer before packaging. These reasons greatly reduce fabrication costs of VCSELs 100 over edge-emitting structures.
"Further, edge-emitting devices require cleaving to separate the wafer into individual laser bars and facet coating to form the mirrors, while VCSELs 100 do not depend on any facets or cleaving for operation. Such design techniques greatly improve the yield and reliability of VCSELs because the output facets of edge-emitters are the main source of failure. The output aperture of a VCSEL is also larger than an edge-emitter, which results in a lower output power density at the facet and reduced hotspots on the wafer. Also, the output mirror is not fully defined by the surface 130 of the semiconductor, but rather by a stack of low and high index of refraction semiconductor layers in the mirrors 112 and 116, and hence the peak electric field is within the VCSEL structure 102 and not at the semiconductor surface 130. Thus, VCSELs do not suffer from catastrophic optical damage, commonly seen in edge-emitters. Finally, VCSELs have a lower wavelength drift coefficient (0.08 nm/.degree. C.) than edge-emitters (0.32 nm/.degree. C.) translating into either relaxed temperature control or better pumping efficiency when used to pump a solid-state medium with a narrow absorption range.
"Currently VCSELs 100 are used primarily for lower-power applications, such as in short-reach datacom (850 and 980 nm), telecommunications (1300-1550 nm), optical mice, and spectroscopy. Higher powers are needed for optical pumping, industrial cutting, medical, and defense applications. High power laser applications have been dominated by edge-emitting devices through the use of longer cavity, broad area lasers arranged in parallel bars or serial laser bar stacking.
"One of the main reasons high powers are enabled in edge-emitting devices is through proper thermal management by junction or epi-side down mounting. Although this is also true for VCSELs, VCSEL designs have not performed as well in such applications.
"The main source of heating in an electrically pumped VCSEL 100 is in the active region 114 and in the DBRs 112 and 116 through joule heating where current flow 122 is passed. The heat in a VCSEL 100 must then be pulled out of the gain region 114. By flip-chip bonding the VCSEL 100 epi-side down onto a heat sink 106, significant improvement of the output power characteristics can be achieved due to a short heat extraction path.
"With proper design and thermal management, high-power VCSELs have been achieved at 980 nm by bonding a 2D array of high-efficiency VCSELs designed with an optimized fill factor. The anode was bonded to the heat sink and the cathode metal was deposited directly onto the backside thinned substrate. Currently, overall wall-plug efficiencies are at 50%, slightly lower than the state-of-the-art high-power edge-emitting lasers (70%).
"At the wavelengths near 900 nanometers or longer, high-power VCSELs can be easily obtained using standard VCSEL processing techniques. Flip-chip bonding allows for VCSELs to be mounted epi-side down onto heat sinks 106. The GaAs substrate 118 is transparent to the >900 nm emission, and any loss from free carrier absorption can be minimized by thinning and polishing the substrate 118. Backside metal onto upper contact 120 can be deposited using standard techniques, allowing ease of direct contacting or wirebonding to the metalized substrate 118 and the epi-side contacts via the heat sink. This process readily allows annealing of both contacts prior to flip-chip bonding the VCSEL 100 devices to a heat sink 106. This is important as annealing of the device contacts results in lower contact resistance and thus higher efficiencies and lower power dissipation, key requirements for efficient, high-power VCSELs.
"However, for emission energies near or larger than the bandgap of the GaAs substrate 118, the emission from the gain region 114 would be absorbed by the substrate 118, resulting in lower output emission 128 power and increased heating due to absorption, thereby limiting the ability to easily fabricate bottom emitting VCSELs using flip-chip bonding. While top emitting VCSELs with wavelengths shorter than 900 nm can be designed, the structure 102 would have to be mounted with the substrate 118 side against the heat sink 106, thereby limiting the effective thermal transmission from gain region 114 to heatsink 106, which results in lower heat dissipation and decreased device performance because of the thermal impedance of the substrate.
"Therefore, the challenge in developing high-power, bottom-emitting, VCSELs below about 900 nm lies in fabrication techniques for extracting the radiated light emission while also providing good thermal management for high efficiency.
"FIG. 2 illustrates an example bottom-emitting VCSEL of the related art.
"VCSEL 200 is shown, with an etched substrate emission area 202, also known as a substrate via 202 or light outcoupling via 202. This via 202 is made by removing the substrate 118 is areas where emission 128 is desired from VCSEL 200, however, this partial removal of the substrate 118 requires deep and precise etching of the substrate 118. While this approach facilitates backside metal deposition and annealing prior to flip-chip bonding, high packing densities for VCSEL 200 arrays is difficult due to the relatively large diameter and deep vias 202 in the substrate 118 to account for diffraction of the emission 128.
"Other approaches to this issue have employed transparent substrates 118. One approach is to grow the VCSEL structure 102 on AlGaAs substrates 118, which are transparent at wavelengths above the bandgap energy of GaAs . This approach, however, is limited to AlGaAs substrates 118 containing low concentrations of aluminum. This approach requires challenging and precise oxide removal techniques of the AlGaAs substrate before commencing growth, resulting in possible degradation of the epilayers grown. Furthermore, this approach limits the VCSEL design to those wavelengths that are smaller than the bandgap of the AlGaAs substrate.
"Within VCSEL structures, high power inputs are needed to produce high power outputs. Typically, a 1 kilowatt output is generated using 2 volts and 1 kiloamperes, but this is difficult in VCSEL structures because it is difficult to generate such high currents and also because of the heat generated within the structure. Prior attempts at running high current in series VCSEL devices has been somewhat frustrated because of the planar connections in VCSELs. Changes in the voltage to generate equivalent power is possible if the strength of the dielectric is high enough, but parallel current generation for each VCSEL as done in the related art reduces or eliminates the advantage of increasing the voltage, as VCSELs again are difficult to connect in a series fashion.
"Other techniques for transparent substrates involve wafer bonding of the 850 nm VCSEL epitaxial structure onto a GaP substrate, temporary carrier transfers to glass substrates, and complete removal of the GaAs substrate. Each of these techniques reduce yields and result in less than desirable devices.
"It can be seen, then, that there is a need in the art for high power VCSEL devices and arrays that can be connected serially."
As a supplement to the background information on this patent, VerticalNews correspondents also obtained the inventors' summary information for this patent: "To minimize the limitations in the prior art, and to minimize other limitations that will become apparent upon reading and understanding the present specification, the present invention describes Vertical Cavity Surface Emitting Laser (VCSEL) arrays and methods for making such arrays.
"A Vertical Cavity Surface Emitting Laser (VCSEL) array in accordance with one or more embodiments of the present invention comprises a plurality of first mirrors, a plurality of second mirrors, a plurality of active regions, coupled between the plurality of first mirrors and the plurality of second mirrors, and a heatsink, thermally and mechanically coupled to the second mirror opposite the plurality of active regions, wherein an electrical path to at least one of the plurality of second mirrors is made through a via formed through a depth of the plurality of second mirrors, and a plurality of VCSELs in the VCSEL array are connected in series.
"Such a VCSEL array further optionally comprises the electrical path to a mirror in the plurality of second mirrors and an electrical path to a first mirror in the plurality of first mirrors being accessed from a non-emission surface of the VCSEL, a plurality of VCSELs in the array being connected in parallel, a plurality of electrical paths to the plurality of first mirrors, the plurality of electrical contacts being annealed, the plurality of electrical paths being made from copper, the plurality of electrical paths being at least partially formed through chemical mechanical planarization, and a plurality of VCSEL arrays being formed on a single substrate.
"A further understanding of the nature and details of the present invention may be realized by reference to the remaining portions of the specifications and drawings. The preferred embodiments of this invention are described below to further clarify the structure and method for achieving said invention."
For additional information on this patent, see: Geske,
Keywords for this news article include: Electronics, Semiconductor,
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