News Column

Patent Issued for Memory Controller and Non-Volatile Storage Device

March 5, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- Panasonic Corporation (Osaka, JP) has been issued patent number 8656252, according to news reporting originating out of Alexandria, Virginia, by VerticalNews editors.

The patent's inventors are So, Hirokazu (Kyoto, JP); Honda, Toshiyuki (Kyoto, JP).

This patent was filed on May 3, 2012 and was published online on February 18, 2014.

From the background information supplied by the inventors, news correspondents obtained the following quote: "The present invention relates to a memory controller for controlling a non-volatile memory, and a non-volatile storage device such as a semiconductor memory card including the non-volatile memory and the memory controller.

"In recent years, a demand for a non-volatile storage device including a rewritable non-volatile memory is increasing, centering on a semiconductor memory card.

"The semiconductor memory card has various features such as being small and light weight, having large capacity and resistance to quake, and being easy and convenient to handle, and hence the demand for such a semiconductor memory card is increasing as a recording medium of a portable device such as a digital still camera or a portable telephone. Recently, a slot for the semiconductor memory card is provided as a standard not only in the portable device but also in a stationary device such as a digital television and a DVD recorder, and thus the demand for the semiconductor memory card is further increasing.

"The semiconductor memory card described above includes a flash memory (mainly NAND flash memory) serving as a non-volatile main storage memory, and has a memory controller for controlling the same. The memory controller carries out read/write control of data with respect to the flash memory in accordance with a read/write command of data from an access device represented by a digital still camera main body, or the like.

"The writing of data from the memory controller to the flash memory is carried out in units called a page. The main stream in a recent flash memory is a page size of about 4 kB (kilobyte) or 8 kB.

"The flash memory includes a number of storage elements called cells, and stores information by accumulating or discharging charges to and from each cell. The writing of data to each cell is carried out by applying voltage to a word line and a bit line connected to the cell. A page, which is a write unit of the data, is configured by a plurality of cells sharing a word line.

"Meanwhile, the information stored in the cell may get lost due to failure or degradation of the cell. The memory controller thus generally generates an error correcting code with respect to write data from the access device, and stores the same in the flash memory with the write data. Thus, even if an error occurs during the reading of the data, correction can be made if the number of error bits is within a correction capability of the error correcting code to be applied, so that correct data can be read. For example, Japanese Patent Publication No. 2005-292925 proposes a method of alternately storing the write data (user data) and the error correcting code (additional data) in a page of the flash memory.

"In the method described above, however, correct data cannot be read if an error beyond the correction capability of the error correcting code occurs during the reading of the data."

Supplementing the background information on this patent, VerticalNews reporters also obtained the inventors' summary information for this patent: "The present invention has been made in view of the above problems, and an object of the present invention is to provide a non-volatile storage device capable of correctly reading data even if an error beyond the correction capability of the error correcting code occurs during the reading of the data.

"To solve the above problems, the present inventors have devised a method of further giving a second error correcting code with respect to a set of data to which an error correcting code (hereinafter referred to as first error correcting code) is given. For example, the present inventors have devised a method of giving a parity of one page with respect to the data for four pages as the second error correcting code. In this manner, even if an error beyond the correction capability of the first error correcting code occurs, correct data can be read by using the second error correcting code (parity).

"However, according to the method described above, if a failure occurs in the word line corresponding to the page storing the data, all the cells configuring the page are influenced by the failure of the word line and a burst error occurs when reading the relevant page. As a result, correct data may not be read if the number of error bits exceeds a correction capability of an error correcting code to be applied. In particular, one word line is shared by a plurality of pages in the flash memory of multi-level cell (MLC), which is increasing in recent years. Thus, the range of data loss by the failure of one word line is increasing, and the influence thereof is becoming greater.

"Generally, the burst error caused by the failure of the word line is assumed to have lower occurrence probability than a random error caused by the defect of a cell, or the like. However, in a system where high reliability of stored data is to be ensured, it is desired that the reading of data is prevented from being disabled as much as possible due to the occurrence of the burst error.

"In view of the above problems, it is an object of the present invention to provide a non-volatile storage device and a memory controller capable of correctly reading the stored data even if a burst error caused by the word line failure occurs in the non-volatile memory.

"A non-volatile storage device according to the present invention relates to a non-volatile storage device, which communicates with an access device and carries out reading and/or writing of data in accordance with a command from the access device, the device including one or more non-volatile memories for storing data; and a memory controller for carrying out control of the non-volatile memory; wherein the non-volatile memory includes a plurality of blocks, which are erase units, each of the blocks including a plurality of pages, which are write units of data, in each of the blocks at least one set of pages existing which include at least two pages sharing one word line; and the memory controller, configures a plurality of error correcting groups each including at least one data page, which is a page for storing data, and at least one error correcting code page for storing a code for error correcting calculation of the data page, and assigns a page of a separate word line with respect to each of the data page and the error correcting page in the same error correcting group.

"A memory controller according to the present invention relates to a memory controller for carrying out control of one or more non-volatile memories for storing data, wherein the non-volatile memory includes a plurality of blocks, which are erase units, each of the blocks including a plurality of pages, which are write units of data, in each of the blocks at least one set of pages existing which include at least two pages sharing one word line; and the memory controller, configures a plurality of error correcting groups each including at least one data page, which is a page for storing data, and at least one error correcting code page for storing a code for error correcting calculation of the data page, and assigns a page of a separate word line with respect to each of the data page and the error correcting page in the same error correcting group.

"According to the present invention, a second error correcting code is given to a set of data given a first error correcting code, and then stored in a non-volatile memory. Thus, the data can be correctly read even if an error beyond a correction capability of the first error correcting code occurs when reading the data. Furthermore, according to the present invention, even if a burst error caused by a failure in one word line occurred in the non-volatile memory, other data pages and parity pages configuring the parity group can be read by other word lines. Accordingly, the data page in which the burst error occurred can be restored, and as a result, the stored data can be correctly read."

For the URL and additional information on this patent, see: So, Hirokazu; Honda, Toshiyuki. Memory Controller and Non-Volatile Storage Device. U.S. Patent Number 8656252, filed May 3, 2012, and published online on February 18, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=16&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=773&f=G&l=50&co1=AND&d=PTXT&s1=20140218.PD.&OS=ISD/20140218&RS=ISD/20140218

Keywords for this news article include: Electronics, Semiconductor, Panasonic Corporation.

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Source: Electronics Newsweekly


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