"The exceptional performance and low power credentials of our latest M-class CPUs have already generated a lot of excitement with our key licensees and partners. And with advanced functionality such as virtualization, full FPUs and advanced DSP capabilities, complemented by mature tools both from ourselves and our ecosystem partners such as Mentor Graphics and
The first available M-class cores are the M5100 and the M5150. The M5100 integrates a real-time execution unit and
Reflecting Imagination's strength in embedded processing, previous-generation entry-level MIPS cores provide class-leading performance efficiency, and have been widely adopted across a broad array of applications. Imagination has already secured multiple licenses for the M51xx cores targeting embedded processing, automotive and beyond.
As with other MIPS Series5 cores, the M-class cores implement the MIPS Release 5 architecture incorporating hardware virtualization. The M51xx cores are based on the same 5-stage pipeline architecture and leverage the high performance, comprehensive digital signal processing (DSP)/SIMD features of the previous generation MIPS microAptiv family of cores, along with the microMIPS Instruction Set Architecture (ISA) which provides up to 30% code size reduction over 32-bit only code.
Virtualization: anticipating the needs of future
The addition of hardware virtualization to MCU-class cores provides increased security and reliability for a wide range of applications. Based on feedback from numerous partners, Imagination believes the need for virtualization is growing from the low end to the high end. This is why the entire line-up of Imagination's MIPS Series5 Warrior cores, including the entry-level M-class, the mid-range I-class and the high-end P-class cores, all incorporate hardware virtualization technology, resulting in a unified security and virtualization strategy throughout the system and across the entire SoC.
With virtualization, multiple, unmodified, operating systems and applications can run independently and securely at the same time on a single, trusted platform. This delivers a range of benefits for system development, including:
• Ability to execute multiple tasks in isolation• Intelligent resource allocation across several guests• Secure downloads/uploads• IP protection
Built-in prioritization mechanisms in the MIPS virtualization architecture, with support for up to seven secure/non-secure guests, enable it to optimally support real-time functionality.
In space-constrained, low-power systems such as IoT or wearable devices, virtualization could be used to implement a multiple-guest environment where one guest running a real-time kernel manages the secure transmission of sensor data, while another guest, under RTOS control, can provide the multimedia capabilities of the system. For applications that demand an even higher level of security, the new M-class cores include tamper resistant features that provide countermeasures to unwanted access to the processor operating state. A secure debug feature increases the benefit by preventing external debug probes from accessing and interrogating the core internals.
FPU: high-end performance, low-end size
The new M51xx cores also feature a Floating Point Unit (FPU) option supporting both single and double precision instructions for improved control systems processing. The FPU is well-proven, having been implemented in high-end MIPS cores.
Tools: everything you need
A broad range of development tools is already available for the M51xx cores, from Imagination and numerous companies across the MIPS embedded ecosystem, with additional support in development. This includes compilers from Mentor Graphics and
The MIPS M5150 and M5100 cores are available for licensing now. Contact email@example.com for more information.
About MIPS processors
Imagination's family of MIPS CPU IP cores are ideal for products where ultra-low power, compact silicon area and high levels of integration are required. The comprehensive portfolio of MIPS processor IP cores range from the smallest cores for 32-bit MCUs to high-performance 32-bit and 64-bit multi-core solutions. Based on a heritage of continuous innovations over more than three decades, including full support for 64-bit for more than 20 years, Imagination's MIPS architecture is the industry's most mature and efficient RISC architecture, delivering the highest performance and lowest power consumption in a given silicon area. Thanks to the clean architecture, small silicon area and advanced power and thermal efficiency of the MIPS architecture, SoC designers have the ideal CPU solution for any application from the highest performance network servers, to the most power-efficient mobile applications processors, down to the smallest deeply embedded microcontrollers for IoT.
The CPU IP cores comprising the MIPS Warrior family come in three performance/feature classes:
• Warrior M-class: entry-level MIPS cores for embedded and microcontroller applications• Warrior I-class: mid-range, feature-rich MIPS CPUs• Warrior P-class: high-performance MIPS processors
Imagination is a global technology leader whose products touch the lives of billions of people throughout the world. The company's broad range of silicon IP (intellectual property) includes the key multimedia, communications and general purpose processors needed to create the SoCs (Systems on Chips) that power all mobile, consumer, automotive, enterprise, infrastructure, IoT and embedded electronics. These are complemented by its unique software and cloud IP and system solution focus, enabling its licensees and partners get to market quickly by creating and leveraging highly differentiated SoC platforms. Imagination's licensees include many of the world's leading semiconductor manufacturers, network operators and OEMs/ODMs who are creating some of the world's most iconic and disruptive products. See: www.imgtec.com.
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