As engines move to even lower fuel consumption, new control mechanisms are now required to deal with the introduction of new combustion methods and further system evolution associated with downsizing. High-speed real-time processing, such as dynamically switching between multiple control algorithms according to the load in response to feedback from various sensors, will become necessary, and a performance level three to five times that will be required in automotive MCUs. Furthermore, while the number of ECUs is increasing, if we consider the limitations on power supply, such as the practice of stopping the engine when the car is temporarily stopped, it is clear that while performance must be improved, it is also necessary to reduce power consumption.
Also, due to issues such as the increasing complexity of integrating multiple MCUs and the control algorithms themselves, flash MCUs will require an increase in on-chip flash memory capacity to about three times that of previous devices. At the same time, since it is now extremely important to increase the safety and security of automotive control and of the requirements on automotive MCUs, high-level functional safety has become critical. A new many-core architecture is now required for the inclusion of multiple dual processors operating in lock step, and for the integration of a variety of functions. In low fuel consumption engines, the processing accelerators for the injection pulse generation and signal processing required for high-precision combustion control, knock control, and cooperative control with the driving support systems that will lead to autonomous cars are now required and thus a higher integration density, that is, moving to a finer feature size fabrication process, is now indispensable.
Renesas' current 40 nm process technology supports up to 8MB of on-chip flash memory for MCUs. However, on-chip MCU flash memory modules as large as 10 MB will be required to support the increasing sophistication of the control systems implemented with MCUs.
Moving to smaller process geometry is one approach to increasing the integration density of the flash memory and peripheral functions that are integrated on a single chip. Single-chip MCUs developed using Renesas' new 28 nm process technology will be able to support a maximum capacity of over 16MB flash memory on chip. Renesas has been moving forward with prototypes in the 28 nm process, which features even finer features than the existing 40 nm process.
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