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Researchers Submit Patent Application, "Iii-V Light Emitting Device with Thin N-Type Region", for Approval

February 26, 2014

By a News Reporter-Staff News Editor at Electronics Newsweekly -- From Washington, D.C., VerticalNews journalists report that a patent application by the inventors Michel, Frederic Georges (Seyssins, FR); Epler, John Edward (San Jose, CA), filed on October 9, 2013, was made available online on February 13, 2014.

The patent's assignee is Koninklijke Philips N.v.

News editors obtained the following quote from the background information supplied by the inventors: "The present invention relates to a III-V light emitting device with a transparent conductive oxide connected to the n-type region.

"Semiconductor light-emitting devices including light emitting diodes (LEDs), resonant cavity light emitting diodes (RCLEDs), vertical cavity laser diodes (VCSELs), and edge emitting lasers are among the most efficient light sources currently available. Materials systems currently of interest in the manufacture of high-brightness light emitting devices capable of operation across the visible spectrum include Group III-V semiconductors, particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as III-nitride materials. Typically, III-nitride light emitting devices are fabricated by epitaxially growing a stack of semiconductor layers of different compositions and dopant concentrations on a sapphire, silicon carbide, III-nitride, or other suitable substrate by metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques. The stack often includes one or more n-type layers doped with, for example, Si, formed over the substrate, one or more light emitting layers in an active region formed over the n-type layer or layers, and one or more p-type layers doped with, for example, Mg, formed over the active region. Electrical contacts are formed on the n- and p-type regions.

"Since native III-nitride growth substrates are generally expensive, not widely available, and impractical for growth of commercial devices, III-nitride devices are often grown on sapphire (Al.sub.2O.sub.3), SiC, or Si substrates. Such non-native substrates have different lattice constants than the bulk lattice constants of the III-nitride device layers grown on the substrate, different thermal expansion coefficients, and different chemical and structural properties than the device layers, resulting in strain in the device layers, and chemical and structural mismatch between the device layers and the substrates. Growth of thick layers can reduce the output of the device, and require extra source material, which can increase the cost of a device. If the device layers are grown overly thick, the strain may be relieved by cracking, which can negatively impact the device performance.

"When a III-nitride device is conventionally grown on Al.sub.2O.sub.3, the first structure grown on the substrate is generally a GaN template layer with an in-plane a-lattice constant of about 3.189 .ANG. or less. The GaN template serves as a lattice constant template for the light emitting region in that it sets the lattice constant for all of the strained layers grown above the template layer, including the InGaN light emitting layer. Since the bulk lattice constant of InGaN is larger than the in-plane lattice constant of the conventional GaN template, the light emitting layer is compressively strained when grown over a conventional GaN template. For example, a light emitting layer configured to emit light of about 450 nm may have a composition In.sub.0.16Ga.sub.0.84N, a composition with a bulk lattice constant of 3.242 .ANG., as compared to the lattice constant of GaN, 3.189 .ANG.. As the InN composition in the light emitting layer increases, as in devices designed to emit light at longer wavelengths, the compressive strain in the light emitting layer also increases.

"Several techniques for reducing the strain in the light emitting layer have been proposed.

"US 2008/0153192, titled 'III-nitride light emitting devices grown on templates to reduce strain' and incorporated herein by reference, teaches growing the device layers including the light emitting layer of a III-nitride device over a template designed to reduce strain in the device, in particular in the light emitting layer. The template is grown on a conventional substrate such as sapphire.

"US 2007/0072324, titled 'Substrate for growing a III-V light emitting device' and incorporated herein by reference, teaches growing a III-nitride device over a composite substrate, which includes a host substrate, a seed layer, and a bonding layer that bonds the host to the seed layer. The host substrate provides mechanical support to the composite substrate and to the semiconductor device layers grown over the composite substrate. The seed layer is generally a single crystal material that is a reasonably close lattice-match to the device layers. With such a substrate, it is possible to increase the lattice constant beyond GaN, in which case the device layers grown on these templates generally contain In. Incorporation of In is not energetically favorable and growth of InGaN is slow. Thick InGaN layers are therefore not commercially feasible.

"Needed in the art are devices that do not require thick n-type regions."

As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "It is an object of the invention to provide a device with a thin n-type region.

"In embodiments of the invention, a device includes a semiconductor structure comprising a III-phosphide light emitting layer disposed between an n-type region and a p-type region. A transparent, conductive oxide is disposed in direct contact with the n-type region. In some embodiments, a total thickness of semiconductor material between the light emitting layer and the transparent, conductive oxide is less than one micron.


"FIG. 1 illustrates device layers grown over a substrate.

"FIG. 2 illustrates trenches formed in the structure of FIG. 1.

"FIG. 3 illustrates the structure of FIG. 2 bonded to a mount. FIG. 3 further illustrates removal of the growth substrate of the structure of FIG. 2

"FIG. 4 illustrates the trenches of the structure of FIG. 3 filled with a dielectric.

"FIG. 5 illustrates a transparent conductive material and n-contacts formed on the structure of FIG. 4.

"FIG. 6 illustrates device layers grown on a composite substrate with a seed layer formed in regions with trenches separating the regions.

"FIG. 7 illustrates the structure of FIG. 6 bonded to an intermediate substrate.

"FIG. 8 illustrates the structure of FIG. 7 after the host substrate of the composite growth substrate is removed.

"FIG. 9 illustrated the structure of FIG. 8 after the seed layer is removed.

"FIG. 10 illustrates the structure of FIG. 9 after forming a transparent, conductive layer on the exposed semiconductor surface.

"FIG. 11 illustrates the structure of FIG. 10 after bonding to a optical element and removing the intermediate substrate.

"FIG. 12 illustrates the structure of FIG. 11 after removing any remaining bonding layers to expose a surface of the p-contact.

"FIG. 13 illustrates a region of FIG. 12, with contacts formed in a flip chip formation."

For additional information on this patent application, see: Michel, Frederic Georges; Epler, John Edward. Iii-V Light Emitting Device with Thin N-Type Region. Filed October 9, 2013 and posted February 13, 2014. Patent URL:

Keywords for this news article include: Electronics, Semiconductor, Light-emitting Diode, Koninklijke Philips N.v..

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Source: Electronics Newsweekly

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