Patent number 8650428 is assigned to
The following quote was obtained by the news editors from the background information supplied by the inventors: "This disclosure relates to integrated circuits and, more particularly, to digital power estimation of components on the integrated circuits during operation.
"Many modern processors are capable of consuming a great deal of power and in so doing may generate a significant amount of heat. If left unchecked, this heat could cause catastrophic damage to the processor. Thus, power management systems have been developed to limit the power that the processor consumes and thus the heat generated. In many power management systems, the thermal design power (TDP) for the whole chip is commonly the primary metric that is used to control power and ensure thermal limits are not exceeded. Typically, if the thermal limits are being reached, or the thermal power reaches a particular threshold, the power management system may throttle the processor by reducing performance. Conversely, if power consumption can be accurately measured while running a given application, and the power used is less than the TDP capability of the platform, performance may be increased by allowing the processor to consume the available headroom in the TDP by increasing the operating voltage, the operating frequency or both. However, since the capabilities of conventional thermal measurement mechanisms have less than acceptable granularity and repeatability in many cases, modulating activity based upon thermal and/or power limits of individual components becomes difficult. This may be particularly true vary as various application programs are executed and the corresponding processor loads increase and decrease."
In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "Various embodiments of a system and method for dynamically calculating weights for use in a digital power estimation system are disclosed. Broadly speaking, controlling power consumption on an integrated circuit device has been an imprecise effort in the past. With the advent of digital power estimation techniques, the granularity and precision of the estimated power on a per component basis has improved significantly. However, as conditions change such as processor loads changing as various applications execute, the accuracy of some digital power estimations may degrade. Accordingly, a power management system is contemplated that may estimate the power consumed by the various processor cores and portions of those cores in a processing node using signal activity and weight factor values that correspond to those signals. In addition, during operation of the processor cores the power management system may adaptively generate new weight factor values in the background. The new weight factors may be used for the power estimates if they produce more accurate power estimates than current power estimates.
"In one embodiment, a system includes a power management unit that may be configured to estimate the power consumed by at least a portion of each of one or more processor cores during operation of each processor core. The power management unit may be configured to generate a sum of activity values and normal weight factor values for a predetermined set of signals within each processor core to estimate the power consumed. The power management unit may also be configured to adaptively generate and selectively use new weight factor values to estimate the power consumed based upon a total measured dynamic power consumed by each processor core during operation.
"In one specific implementation, the power management unit may be configured to independently control a performance of each of the processor cores based upon the estimation of the power consumed by various portions of each processor core.
"In another specific implementation, the system may further include a voltage regulator unit that may be configured to provide a voltage and corresponding current to each processor core and to provide an associated voltage and current measurement value to the power management unit to obtain the total measured dynamic power.
"In another embodiment, a method includes a power management unit measuring a total dynamic power consumed by an integrated circuit device during operation of the integrated circuit device. The method may also include generating a weighted sum that includes activity values and normal weight factor values for each of a plurality of predetermined signals within the semiconductor device to generate an estimate of the power consumed by at least a portion of the integrated circuit device. The method may further include adaptively generating and selectively using new weight factor values to estimate the power consumed based upon a difference between the measured total dynamic power consumed by at least a portion of the integrated circuit device and the estimate of the power consumed during operation of the integrated circuit device."
URL and more information on this patent, see: Bajic, Lejla; Bajic, Ljubisa. Dynamic Weight Calculation in a Digital Power Estimation and Management System. U.S. Patent Number 8650428, filed
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