News Column

Patent Issued for Semiconductor Packages and Electronic Systems Including the Same

February 19, 2014



By a News Reporter-Staff News Editor at Electronics Newsweekly -- A patent by the inventors Kim, Hye-Jin (Suwon-si, KR); Kim, Byung-Seo (Suwon-si, KR); Youn, Sunpil (Seoul, KR), filed on September 28, 2012, was published online on February 4, 2014, according to news reporting originating from Alexandria, Virginia, by VerticalNews correspondents.

Patent number 8643193 is assigned to Samsung Electronics Co., Ltd. (Gyeonggi-do, KR).

The following quote was obtained by the news editors from the background information supplied by the inventors: "Example embodiments relate to semiconductor devices and electronic systems including the same, and more particularly, to a semiconductor packages having a plurality of semiconductor chips mounted therein and electronic systems including the same.

"Semiconductor products require processing of high-volume data in spite of a decrease in their volume. As a result, highly integrated semiconductor chips implemented in the semiconductor chips as a single package may be necessary. However, higher integration of the semiconductor chips may be difficult to achieve due to the limitation of integration technologies and may be more expensive. In this context, a semiconductor package of a multi-chip type in which a plurality of semiconductor chips are implemented in a single package is under consideration."

In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "According to example embodiments, there is provided a semiconductor package. A substrate may be provided. A plurality of semiconductor chips may be deposited on the substrate, and each of them may include at least one electrode pad. At least one of the plurality of semiconductor chips may include at least one redistribution pad configured to electrically connect with the at least one electrode pad.

"In example embodiments of the semiconductor package, the at least one of the plurality of semiconductor chips may further include at least one redistribution line configured to connect the at least one electrode pad with the at least one redistribution pad.

"In example embodiments of the semiconductor package, the at least one redistribution pad and the at least one electrode pad of the at least one of the plurality of semiconductor chips may be disposed along different edges on the same surface of the at least one of the plurality of semiconductor chips.

"In example embodiments of the semiconductor package, the plurality of semiconductor chips may further include a upper semiconductor chip on the at least one of the plurality of semiconductor chips, and at least one electrode pad of the upper semiconductor chip may be adjacent to the at least one redistribution pad.

"In example embodiments of the semiconductor package, the plurality of semiconductor chips may be stacked in offset directions from one another. The at least one redistribution pad and the at least one electrode pad of the at least one of the plurality of semiconductor chips may be exposed.

"According to example embodiments, there is provided a semiconductor package. A substrate is provided. A plurality of first semiconductor chips may be on a first portion of the substrate and each of them may include at least one electrode pad. A second semiconductor chip may be deposited on a second portion of the substrate, which is different from the first portion. At least one of the plurality of first semiconductor chips may include at least one redistribution pad configured to electrically connect with the at least one electrode pad.

"In example embodiments, the at least one of the plurality of first semiconductor chips may include at least one redistribution line configured to connect the at least one electrode pad with the at least one redistribution pad. The at least one redistribution pad and the at least one electrode pad of the at least one of the plurality of first semiconductor chips may be disposed along different edges on the same surface of the at least one of the plurality of first semiconductor chips.

"In example embodiments, the plurality of first semiconductor chips may further include an upper semiconductor chip stacked directly on the at least one of the plurality of first semiconductor chips, and at least one electrode pad of the upper semiconductor chip adjacent to the at least one redistribution pad. The plurality of first semiconductor chips may be stacked in offset directions from one another. The at least one redistribution pad and the at least one electrode pad of the at least one of the plurality of first semiconductor chips are exposed. The at least one redistribution pad of the at least one of the plurality of first semiconductor chips may be exposed, and the at least one electrode pad of the at least one of the plurality of first semiconductor chips may be covered with other semiconductor chips.

"In example embodiments, the semiconductor package may further include a plurality of bonding wires configured to connect the plurality of semiconductor chips, wherein at least one of the plurality of bonding wires may be connected with the at least one of the plurality of first semiconductor chips through the at least one redistribution pad.

"According to example embodiments, there is provided an electronic system. An input/output unit may be provided to communicate data with an external device. A memory unit may be provided to store the data. A processor unit may be provided to execute the data. The memory unit may include any one of the above-described semiconductor packages. The processor unit, the input/output unit, and the memory unit may communicate data therebetween via a bus."

URL and more information on this patent, see: Kim, Hye-Jin; Kim, Byung-Seo; Youn, Sunpil. Semiconductor Packages and Electronic Systems Including the Same. U.S. Patent Number 8643193, filed September 28, 2012, and published online on February 4, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=69&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=3416&f=G&l=50&co1=AND&d=PTXT&s1=20140204.PD.&OS=ISD/20140204&RS=ISD/20140204

Keywords for this news article include: Semiconductor, Samsung Electronics Co. Ltd..

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Source: Electronics Newsweekly


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