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Patent Issued for Run-Time Testing of Memory Locations in a Non-Volatile Memory

February 19, 2014

By a News Reporter-Staff News Editor at Journal of Engineering -- A patent by the inventors Byom, Matthew (Campbell, CA); Post, Daniel J. (Campbell, CA); Herman, Kenneth (San Jose, CA); Khmelnitsky, Vadim (Foster City, CA), filed on March 24, 2010, was published online on February 4, 2014, according to news reporting originating from Alexandria, Virginia, by VerticalNews correspondents.

Patent number 8645776 is assigned to Apple Inc. (Cupertino, CA).

The following quote was obtained by the news editors from the background information supplied by the inventors: "NAND flash memory, as well as other types of non-volatile memories ('NVMs'), are commonly used for mass storage. For example, consumer electronics such as portable media players or cellular telephones often include raw flash memory or a flash card to store music, videos, and other media.

"Non-volatile memories may include initial defects. Thus, tests are typically performed on these non-volatile memories during their manufacturing phase to ensure that the initial defects do not exceed a predetermined threshold. Those non-volatile memories that pass the test may be configured to avoid using the memory cells that have the initial defects. These non-volatile memories may then be shipped for use by an end user or for packaging into an electronic device that can then be used by an end user.

"Non-volatile memories, however, may develop further defects over time, such as due to over-erasing blocks of the non-volatile memory. These additional defects may be handled using error correcting codes or bad block management."

In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "Systems and methods are disclosed for performing run-time tests on memory locations of a non-volatile memory ('NVM'), such as NAND flash, in order to effectively manage the NVM. 'Run-time' may refer generally to the time when the non-volatile memory is being used by an end user (e.g., when the NVM is disposed in a host device, such as a cellular telephone), as opposed to during the manufacturing or production phase. Thus, instead of performing tests during just the manufacturing phase of a NVM, tests may be employed while the NVM is being used out in the marketplace.

"The non-volatile memory may be of any suitable type. For example, the non-volatile memory can include flash memory, such as one or more flash dies. Optionally, the NVM may be packaged with a NVM controller for managing the NVM, and therefore the NVM may be a managed NVM (e.g., managed NAND) or a raw NVM (e.g., raw NAND). The host device may include a host processor for controlling and managing the memory locations of the NVM and the data stored therein. For simplicity, components (e.g., the host processor or the NVM controller) that can manage a non-volatile memory may sometimes be referred to simply as a 'controller.'

"In some embodiments, the controller may be configured to detect indications that a systemic failure in a die of the NVM has potentially occurred. That is, each die of the NVM may include multiple blocks, and the controller may be configured to determine when errors have occurred in at least one block of a die that may indicate a die-wide failure (i.e., affecting more than one of the blocks in the die). Such indicators of systematic failures may include, for example, certain patterns of failures, a large number of failures in a predetermined number of operations, a certain number of uncorrectable errors, or an increasing bit error rate of a block or die over time.

"In response to detecting an indication of a potential systemic failure of a die, the controller may select one or more blocks in the die to test. Because a systemic failure may affect multiple blocks, the blocks chosen for the test may not need to include the blocks whose errors triggered the test. In some embodiments, the controller may choose one or more free (i.e., erased) blocks in the die. This way, the controller can avoid performing tests on blocks that are currently being used to store user data. In other embodiments, the controller may choose one or more blocks that are programmed with user data, and the controller may perform garbage collection on those blocks to free the blocks for testing.

"The test performed on the chosen blocks can include any suitable type of test. In some embodiments, the test can include repeatedly programming a test pattern into the blocks, verifying the accuracy of the programming, and erasing the blocks for further programming.

"In some embodiments, the controller may be configured to post process the results of the test in order to manage the die of the non-volatile memory. For example, the controller may use the results of the test to determine whether the original error events triggering the test was a die-wide, systemic failure or if the errors were block-specific. The controller may perform any suitable action in response to determining that there is a systemic failure. For example, the controller can provide a notification to the user (particularly if there is a gross die failure), or the controller can perform die-wide management functions. Such die-wide management can include remapping a column of the die (i.e., memory cells along a bit line) to another column in response to determining that there is a column failure. Other systematic failures may include, for example, row failures, peripheral circuitry failures, and error clusters."

URL and more information on this patent, see: Byom, Matthew; Post, Daniel J.; Herman, Kenneth; Khmelnitsky, Vadim. Run-Time Testing of Memory Locations in a Non-Volatile Memory. U.S. Patent Number 8645776, filed March 24, 2010, and published online on February 4, 2014. Patent URL:

Keywords for this news article include: Apple Inc.

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Source: Journal of Engineering

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