The patent's inventor is Chu,
This patent was filed on
From the background information supplied by the inventors, news correspondents obtained the following quote: "Exemplary embodiments relate to a semiconductor memory apparatus and a method of operating the same and, more particularly, to a nonvolatile memory device and a method of operating the same.
"A semiconductor memory apparatus includes memory devices for storing data. In order to increase the integration degree of memory devices, memory devices are being reduced in size. However, such a reduction in size is reaching limits due to restrictions in, for example, semiconductor materials or process conditions.
"To address such a concern, memory devices are being produced as a three-dimensional (3-D) structure. In transitioning the structure of the memory device from a 2-D structure to the 3-D structure, manufacture processes and operation conditions are changed. Further, operation conditions of memory devices have to be set in an optimal state."
Supplementing the background information on this patent, VerticalNews reporters also obtained the inventor's summary information for this patent: "According to exemplary embodiments of this disclosure, the operating characteristic of a semiconductor memory apparatus can be improved by detecting operation conditions and operating the semiconductor memory apparatus in response to the detection.
"A semiconductor memory apparatus according to an aspect of the present disclosure includes a memory block including memory strings having respective channel layers coupled between respective bit lines and a source line, an operation circuit group configured to supply hot holes to the channel layers and to perform an erase operation on the memory cells of the memory strings, an erase operation determination circuit configured to generate a block erase enable signal when hot holes of a target number are supplied to a first channel of the channel layers, and a control circuit configured to perform the erase operation in response to the block erase enable signal.
"A method of operating a semiconductor memory apparatus according to another aspect of this disclosure includes supplying hot holes to the channel layers of memory strings coupled between respective bit lines and a source line, comparing a target number and the number of hot holes supplied to each of the channel layers, and performing an erase operation on the memory cells of the memory strings when hot holes of at least the target number have been supplied to the channel layers."
For the URL and additional information on this patent, see: Chu,
Keywords for this news article include: Electronics,
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