Patent number 8619800 is assigned to Unbound Networks (
The following quote was obtained by the news editors from the background information supplied by the inventors: "A multi-core processor is a single computing component with two or more independent actual central processing units (called 'cores'), which are the units that read and execute program instructions. Multi-core processors are used across many application domains including general-purpose, embedded, network, digital signal processing (DSP), and graphics. The improvement in performance gained by the use of a multi-core processor depends very much on the software algorithms used and their implementation. In particular, possible gains are limited by the fraction of the software that can be run in parallel simultaneously on multiple cores.
"In multi-core network processing, a key challenge is how to exploit all the cores in these devices to achieve maximum networking performance, despite the performance limitations inherent in a symmetric multiprocessing operating system. In the current multi-core network processor architecture, the processing of a data packet is done by one or more core processors. The synchronization between various core processors and various threads of core processors, memory management, etc. are achieved through software programming. Further, when the processing of the data packet passes from one core to another core, the state or synchronization information is passed between the cores or between the threads of the core processing the data packet.
"Significant resources are consumed in passing the state/synchronization information between the threads or the processors which reduces the availability of the resources for performing actual network application related tasks. Therefore, the overhead of passing the state/synchronization information decreases the efficiency of the processor.
"Further, in current architecture, the core processor does not perform any useful network related operation while waiting for the arrival of the next data packet. The core processor may be idle until the next data packet arrives at the core processor. In current systems that have multi-core processors with an array of pipelined special purpose cores, the multi-core processor is limited by the capabilities of the special cores and pipeline depth. The multi-core is also limited by the slowest core."
In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "Introduced here are methods, systems, paradigms and structures for parallel processing using multi-core processors. The disclosed solution can be used in various applications such as general purpose processing, network processing, storage systems, etc. In one embodiment, the above multi-core processor may be used as a (network) processor in a communication network for processing data packets. The network processor includes a plurality of multi-threaded core processors and a plurality of special purpose processors for processing the data packets atomically and in parallel. The network processor processes a data packet by performing a set of network operations on the data packet. The set of network operations can be based on applications/network protocols such as Resource Reservation Protocol (RSVP).
"A particular data packet is processed by a single core processor and by a single thread of the core processor. The core processor may request one or more special purpose processors to perform a subset of the set of network operations on the data packet. A special purpose processor is any processing element that exclusively handles all accesses and updates to a specific set of shared resources such that those shared resources are always accessed and updated atomically. The special purpose processor may be hardware specifically designed to handle certain types of state data (for example, meters, queues, statistics, Volume Table of Contents (VTOCs), etc.) or general purpose cores which have been dedicated to processing the specified set of shared resources. The one or more special-purpose processors processes the data packet by performing the set of operations atomically. That is, the network processor ensures that the shared resources of the network processor used for processing the particular data packet is not used by other resources of the network processor while the particular data packet is being processed. This locking out of the shared resources involved in the process ensures the atomicity of the process.
"An ingress module in the network processor allocates memory for the incoming data packets and stores the data packets in a memory of the network processor. The ingress module generates a packet buffer chain linking various buffers containing portions of the data packet, for a data packet whose size exceeds the buffer size. The ingress module adds the incoming data packets to an input queue from which one of the core processors retrieves a data packet for further processing. An output packet processor in the network processor adds the processed data packet to one of a plurality of output queues based on a quality of service (QoS) associated with the output queue and forwards the data packets contained in the output queues towards their destination addresses based on the QoS.
"Since a single thread of the core processor performs all the set of network operations on the data packet, no state information or synchronization information is passed between processors, which results in faster and more efficient processing of data packets. Also, the number of memory reads and writes are minimized reducing the delay caused due to memory reads and writes. The discussed method, systems, structures and paradigms increase a number of effective operations per packet (EOPP), that is, the number of instructions that can be performed on the data packet to perform application related tasks.
"Some embodiments of the invention have other aspects, elements, features, and steps in addition to or in place of what is described above. These potential additions and replacements are described throughout the rest of the specification."
URL and more information on this patent, see:
Keywords for this news article include: Software, Unbound Networks.
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