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Patent Application Titled "Systems and Methods for Conforming Test Tooling to Integrated Circuit Device Profiles with Compliant Pedestals" Published...

February 6, 2014



Patent Application Titled "Systems and Methods for Conforming Test Tooling to Integrated Circuit Device Profiles with Compliant Pedestals" Published Online

By a News Reporter-Staff News Editor at Politics & Government Week -- According to news reporting originating from Washington, D.C., by VerticalNews journalists, a patent application by the inventors Barabi, Nasser (Lafayette, CA); Ho, Chee Wah (Fremont, CA); Tienzo, Joven R. (Fremont, CA); Kryachek, Oksana (San Francisco, CA); Nazarov, Elena V. (San Mateo, CA), filed on July 3, 2013, was made available online on January 23, 2014.

No assignee for this patent application has been made.

Reporters obtained the following quote from the background information supplied by the inventors: "The present invention generally relates to the testing of IC devices such as packaged semiconductor chips (also referred to as packaged dies), and more particularly relates to device testers configured to conform to the shape of integrated circuit (IC) devices under test (DUTs).

"Conventional integrated circuit devices include a die, incorporating the IC, attached a substrate. The die is bonded electrically (e.g. solder) and physically (e.g. epoxy) to the top of the substrate, at an elevated temperature sufficient to melt solder and to cure the epoxy.

"Initially, before they are bonded to each other, both the substrate and the die are flat. However as illustrated by the simplified and exaggerated cross-sectional view (not to scale) of FIG. 12A, during the cooling process after heated bonding process, device 1280A becomes slightly curved (slightly bowed like the top of a mushroom) because of a mismatch of expansion and contraction coefficients of the die and the substrate.

"The curvature of the device at room temperature (after cooling) should not be a problem because during the assembly of the device to a motherboard, at the elevated reflow temperature (sufficient to melt solder paste) inside a surface mount technology (SMT) reflow oven, the reheated device should become substantially flat again, thereby ensuring satisfactory electrical bonds between the device pads and the motherboard contacts.

"Ideally, the curvature of the device should be preserved prior to assembly to the motherboard. However, these devices need to be tested for proper functionality at different temperatures prior to assembly to the motherboard. Typical device testers are designed with the assumption that the devices under test (DUTs) are flat. As a consequence, the flat profiles of the pedestal, the substrate pusher and the test socket result in undue pressure being exerted on the curved DUT, especially on the die, during testing.

"This undue pressure problem is exacerbated by the existence of other components, in addition to the die, on the same substrate. So in a typical tester, the pedestal and the substrate pusher only contact the die and the perimeter of the substrate, respectively, leaving the remaining surface of the substrate, where the other components reside, unsupported.

"As a result, after testing the surface of the device is somewhat flattened due to the undue pressure from the pedestal and the pusher, and often uneven, due to the uneven pressure between the supported and unsupported surfaces of the DUT. FIG. 12B is a simplified and exaggerated cross-section view (not to scale) of one such exemplary post-testing uneven, e.g., wavy, device 1280B.

"Hence there is an urgent need for improved device tester designs that do not unduly deform the DUTs, especially for devices with thinner substrates needed for manufacturing compact portable electronic devices such as smart phones and tablets."

In addition to obtaining background information on this patent application, VerticalNews editors also obtained the inventors' summary information for this patent application: "To achieve the foregoing and in accordance with the present invention, systems and methods for testing of IC devices such as packaged semiconductor chips, while conforming to the shape of the IC device under test (DUT).

"In one embodiment, an IC device tester configured to maintain a set point temperature on the DUT having a substrate having a die attached to an upper surface thereof, and also configured to conform to the profile of the DUT. The device tester includes a thermal control unit and a test socket assembly.

"The thermal control unit includes a pedestal assembly with a heat-conductive pedestal having a bottom end configured to contact the die of the DUT, a temperature-control fluid circulation block, a thermally-conductive heater having a fuse coupled to a heating element, a substrate pusher configured to contact the substrate of the DUT, and a controllable force distributor for receiving a z-axis force and controllably distribute such z-axis force between the pedestal assembly and the substrate pusher. The test socket assembly includes a test socket operatively coupled to a socket insert for supporting the DUT. The socket insert has a shaped profile substantially conforming to a corresponding profile of the DUT.

"In some embodiments, the test socket assembly has an elevator mechanism that includes a plurality of spring-loaded suspension support pins for supporting the socket insert. The test socket assembly may also include a plurality of spring-loaded test pins. The support pins enable the test pins to be withdrawn while in a rest condition and further enable the test pins to protrude during a test condition.

"In a further embodiment, the test socket assembly has at least one compliant pedestal configured to facilitate the testing of integrated circuits where the DUT comprises a substrate having multiple IC chips with different testing requirements in terms of forces applied and temperatures of testing.

"Note that the various features of the present invention described above may be practiced alone or in combination. These and other features of the present invention will be described in more detail below in the detailed description of the invention and in conjunction with the following figures.

BRIEF DESCRIPTION OF THE DRAWINGS

"In order that the present invention may be more clearly ascertained, some embodiments will now be described, by way of example, with reference to the accompanying drawings, in which:

"FIG. 1 is a side view of an exemplary thermal control unit that includes a z-axis force balancing mechanism in accordance with one aspect of the invention;

"FIG. 2 is a cross-sectional view thereof taken along section lines 2-2 in FIG. 1;

"FIG. 3 is another cross-sectional view thereof taken along section lines 3-3 in FIG. 2;

"FIG. 4 is a bottom perspective view of the z-axis load distributor actuator block of the z-axis force distribution system of the TCU shown in FIGS. 1-4;

"FIG. 5 is a cross-sectional view of the load distributor actuator block shown in FIG. 4 along the line 5-5, in combination with a spring loaded gimbal;

"FIG. 6 is a side view of another exemplary embodiment of a thermal control unit in accordance with the present invention;

"FIG. 7A is cross-sectional view thereof taken along section lines 7A-7A in FIG. 6, while FIG. 7B is an exploded view of FIG. 7A;

"FIG. 8 is another cross-sectional view thereof taken along section lines 8-8 in FIG. 7A;

"FIG. 9 is another cross-sectional view thereof taken along section lines 9-9 in FIG. 7A;

"FIG. 10A is a bottom perspective view of an exemplary z-axis load distributor actuator block for the z-axis force distribution system of the TCU 600 shown in FIGS. 6-9;

"FIG. 10B is a bottom perspective view of an alternative embodiment of the z-axis load distributor actuator block of FIG. 10A;

"FIG. 11 is a cross-sectional view of the load distributor actuator block shown in FIG. 10A along the line 11-11, in combination with a spring loaded gimbal;

"FIG. 12A is a cross-sectional view of a slightly curved IC device prior to testing;

"FIG. 12B is a cross-sectional view of an IC device deformed by testing;

"FIGS. 13A and 13B are cross-sectional views illustrating embodiments of a pedestal, a substrate pusher and the test socket in accordance with the present invention;

"FIGS. 13C and 13D are cross-sectional views of additional embodiments of the test socket inserts;

"FIG. 13E is a perspective view of the test socket and test socket insert for the embodiment of FIG. 13A;

"FIGS. 13F and 13G are cross-sectional views illustrating a suspension pin and a test pin for the embodiment of FIG. 13A, in rest condition and test condition, respectively;

"FIGS. 14A-14D are a front view, a top view, a perspective view and a blown-up view illustrating an exemplary fused heater in accordance with some embodiments of the present invention;

"FIGS. 15A and 15B are perspective and exploded views of another exemplary embodiment of a thermal control unit (TCU) in accordance with the present invention;

"FIGS. 16A and 16B are perspective and exploded views of the Flow Management System (FMS) in accordance with the present invention;

"FIGS. 17A and 17B are perspective and exploded views of the Thermal Head Unit (THU);

"FIGS. 17C and 17D are perspective views of the gimbal module;

"FIG. 17E is a perspective views of the heater assembly;

"FIGS. 17F, 17G, and 17H are perspective and exploded views of the Device Kit Module;

"FIG. 17I is a perspective view of the inner structure of the heat exchanger plate (cold plate);

"FIGS. 17J and 17K are top view and a cross-sectional view along the line 17K-17K for the thermal head unit (THU);

"FIG. 18 is a perspective view of the flexible cable chain assembly;

"FIGS. 19A and 19B are perspective and exploded views of the thermal control unit (TCU) with the dry boxes for condensation abatement;

"FIG. 20 shows a simplified multi-chip substrate having two IC chips;

"FIG. 21 is a perspective view of a pedestal assembly;

"FIG. 22 is an exploded view of a compliant pedestal;

"FIG. 23 shows a top view of the pedestal assembly;

"FIG. 24A is a cross-sectional view of the pedestal assembly along the line 24A-24A in FIG. 23;

"FIG. 24B is a cross-sectional view of the pedestal assembly along the line 24B-24B in FIG. 23; and

"FIG. 24C is a cross-sectional view of the pedestal assembly along the line 24C-24C in FIG. 23."

For more information, see this patent application: Barabi, Nasser; Ho, Chee Wah; Tienzo, Joven R.; Kryachek, Oksana; Nazarov, Elena V. Systems and Methods for Conforming Test Tooling to Integrated Circuit Device Profiles with Compliant Pedestals. Filed July 3, 2013 and posted January 23, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=4591&p=92&f=G&l=50&d=PG01&S1=20140116.PD.&OS=PD/20140116&RS=PD/20140116

Keywords for this news article include: Patents, Electronics, Semiconductor.

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Source: Politics & Government Week


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