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Researchers Submit Patent Application, "Electronic Device Manufacturing Method, Electronic Device, and Chip Assembly", for Approval

February 4, 2014



By a News Reporter-Staff News Editor at China Weekly News -- From Washington, D.C., VerticalNews journalists report that a patent application by the inventors Kubota, Hajime (Kawasaki, JP); ITOH, Masayuki (Kawasaki, JP); Kishi, Masakazu (Kawasaki, JP), filed on September 18, 2013, was made available online on January 23, 2014.

The patent's assignee is Fujitsu Limited.

News editors obtained the following quote from the background information supplied by the inventors: "Electronic devices, such as integrated circuits, are manufactured by, for example, forming wire traces and other circuit patterns on thin slices of chips cut from a silicon or other wafer. FIG. 10 illustrates an example method for manufacturing electronic devices. Referring to FIG. 10(A), rectangular chips 110, each having a predetermined size, are segmented on a front surface of a wafer 100. Additionally, as illustrated in FIG. 10(B), a pattern forming apparatus not illustrated is employed to cause a front surface of each of the chips 110 segmented into the predetermined size to be subjected to a patterning. This forms a circuit pattern 111, such as a wire trace pattern, on the front surface of each of the chips 110 of the wafer 100.

"In addition, referring to FIG. 10, a dicing apparatus not illustrated is employed to cut the wafer 100 into the chips 110, thereby obtaining the chips 110 with patterns formed thereon. This results in the circuit pattern 111 being formed on the front surface of each of the chips 110 and each chip 110 divided by the cutting serving as an electronic device 112. Conventional examples are described in Japanese Laid-open Patent Publication No. 10-56349, Japanese Laid-open Patent Publication No. 04-87408, and Japanese Laid-open Patent Publication No. 11-288881.

"The method for manufacturing the electronic device 112, however, involves burr formed on a cut surface 110A of the chip 110 during the step of cutting of the chip 110 on which the pattern is formed from the wafer 100. FIG. 11 illustrates an example external configuration of the electronic device 112 manufactured through the manufacturing method illustrated in FIGS. 10(A) to 10(C). Specifically, as illustrated in FIG. 11, the burr X is formed on the cut surface 110A of the chip 110 during the step of cutting of the chip 110 on which the pattern is formed from the wafer 100. The burr X on the chip 110 formed during the step of cutting may make a foreign object when, for example, the chip 110 is encapsulated in a synthetic resin or other package. In this case, the burr X on the chip 110 sticks to the circuit pattern 111 on the front surface of the chip 110, thus causing the circuit to be short-circuited, which may make the electronic device 112 a reject.

"Understandably, the burr X formed on the cut surface 110A of the chip 110 may be removed. Individually polishing the chip 110 on which the pattern is formed may be, for example, one possible way to remove the burr X from the chip 110. It is, however, important to pay attention to the chip 110 after pattern formation so as not to damage the circuit pattern 111 formed on the front surface of the chip 110 during removal of the burr X. This requires a large workload during the removal of the burr X. Specifically, removing the burr X on the chips 110 altogether without damaging the circuit patterns 111 is a difficult task to perform.

"Accordingly, it is an object in one aspect of an embodiment of the invention is to provide an electronic device manufacturing method, an electronic device, and a chip assembly that permit burr to be removed from a plurality of chips altogether.

"According to an aspect of an embodiment, an electronic device manufacturing method includes: cutting a wafer to obtain chips on which patterns are yet to be formed; polishing cut surfaces of the obtained chips in one batch; and forming patterns on the polished chips."

As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "According to an aspect of an embodiment, a method for manufacturing an electronic device includes cutting a wafer to obtain chips before pattern formation. The method includes polishing a cut surface of each of the obtained chips in one batch. The method includes bonding together the cut surfaces of the polished chips with an adhesive and forming a pattern on each of the chips bonded together.

"The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims.

"It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention, as claimed.

BRIEF DESCRIPTION OF DRAWINGS

"FIG. 1 is a flowchart illustrating an example electronic device manufacturing method according to a first embodiment;

"FIG. 2 is a diagram illustrating example steps of cutting and polishing according to the first embodiment;

"FIG. 3 is a diagram illustrating example external configurations of a chip according to the first embodiment;

"FIG. 4 is a diagram illustrating example steps of aligning and bonding according to the first embodiment;

"FIG. 5 is a diagram illustrating example steps of bonding and mirror polishing according to the first embodiment;

"FIG. 6 is a partly cutaway, cross-sectional view taken along line A-A of FIG. 5(A);

"FIG. 7 is a diagram illustrating example steps of pattern forming and melting according to the first embodiment;

"FIG. 8 is a diagram illustrating example steps of aligning and bonding according to a second embodiment;

"FIG. 9 is a partly cutaway, cross-sectional view illustrating a chip assembly according to the second embodiment;

"FIG. 10 is a diagram illustrating an example electronic device manufacturing method; and

"FIG. 11 is a diagram illustrating an example external configuration of an electronic device manufactured according to the manufacturing method illustrated in FIG. 10."

For additional information on this patent application, see: Kubota, Hajime; ITOH, Masayuki; Kishi, Masakazu. Electronic Device Manufacturing Method, Electronic Device, and Chip Assembly. Filed September 18, 2013 and posted January 23, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=5033&p=101&f=G&l=50&d=PG01&S1=20140116.PD.&OS=PD/20140116&RS=PD/20140116

Keywords for this news article include: Asia, Fujitsu Limited.

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Source: China Weekly News


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