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Researchers Submit Patent Application, "Solid-State Imaging Device, Manufacturing Method Thereof, and Camera with Alternately Arranged Pixel...

January 29, 2014



Researchers Submit Patent Application, "Solid-State Imaging Device, Manufacturing Method Thereof, and Camera with Alternately Arranged Pixel Combinations", for Approval

By a News Reporter-Staff News Editor at Electronics Newsweekly -- From Washington, D.C., VerticalNews journalists report that a patent application by the inventor Mabuchi, Keiji (Kanagawa, JP), filed on September 5, 2013, was made available online on January 16, 2014.

The patent's assignee is Sony Corporation.

News editors obtained the following quote from the background information supplied by the inventors: "The present invention relates to a solid-state imaging device that converts a signal charge photoelectrically converted by a photoelectric conversion region into an electric signal and the resulting electric signal is then transferred by a transfer transistor, a method of manufacturing such an solid-state imaging device, and an imaging apparatus provided with the solid-state imaging device.

"FIG. 1 illustrates a schematic cross sectional diagram of a transfer transistor used in the solid-state imaging device according to the related art. As shown in FIG. 1, the transfer transistor includes a gate electrode 102 formed on a first conductive type, such as a p-type, semiconductor substrate 100 through an insulating film 101. In addition, a sidewall 103 is formed on the gate electrode 102.

"In a photoelectric conversion region 108, for example, an n-type second conductor-type semiconductor region 104 is formed as a photodiode embedded in the semiconductor substrate 100. Furthermore, for example, a surface-shield region with a p-type first conductive-type semiconductor region 105 is formed on the second conductive-type semiconductor region 104. The first conductive-type semiconductor region 105 of the photoelectric conversion region 108 is provided for preventing the generation of dark current due to an influence of the interface of the semiconductor substrate 100. A second conductive-type semiconductor region 107 having an impurity concentration higher than that of a second conductive-type semiconductor region 104 is formed on the semiconductor substrate 100 in a readout region 109 to be used as a charge readout region. In addition, a second conductive-type semiconductor region 106 having an impurity concentration lower than that of the second conductive-type semiconductor region 104 is formed below the sidewall to obtain an LDD structure.

"Such a transfer transistor accumulates photoelectrically converted electrons in the second conductive-type semiconductor region 104 of the photoelectric conversion region 108. When a high voltage is applied to the gate electrode 102, electrons accumulated in the second conductive-type semiconductor region 104 are transferred from the photoelectric conversion region 108 to the readout region 109.

"In the transfer transistor constructed as described above, the photoelectrically converted charges are accumulated in a portion comparatively deep (i.e., a deep portion) in the second conductive-type semiconductor region 104 of the photoelectric conversion region 108. Therefore, a high voltage may need to be applied to the gate electrode 102 to complete the transfer of charges. However, it is difficult to provide the gate electrode with a high voltage when pixels are further miniaturized.

"Furthermore, the first conductive-type semiconductor region 105 may become a barrier to the transfer of electrons from the photoelectric conversion region 108 to the readout region 109 in the transfer transistor constructed as described above. Thus, the first conductive-type semiconductor region 105 is not formed below the sidewall 103 except in the case of thermal diffusion in the manufacturing process. For this reason, the interface of the semiconductor substrate 100 exists in the second conductive-type semiconductor region 104 below the sidewall 103. Accordingly, dark current occurs in the second conductive-type semiconductor region 104 due to the interface of this semiconductor substrate 100, causing a defective pixel with a white spot. When the first conductive-type semiconductor region 105 is formed below the sidewall 103, it may be a transfer barrier and a still higher voltage may need to be applied to the gate electrode.

"Japanese Unexamined Patent Application Publication No. 2006-49921 (JP 2006-49921 A), for example, has proposed a technology for reducing a transfer voltage in the configuration of the transfer transistor described above using an epitaxial growth method that forms a surface-shield region and an elevated source drain (ESD) region on a semiconductor substrate to reduce the transfer voltage."

As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventor's summary information for this patent application: "However, in the configuration of the transfer transistor as described in JP 2006-49921 A, a p-type semiconductor region functioning as a surface-shield region is not formed on the interface of an n-type semiconductor region on the lower portion of the side wall of a gate electrode on the PD side. Therefore, it is difficult to prevent dark current from being generated from the interface of the n-type semiconductor region although a transfer voltage may be lowered, causing a defective pixel with a white spot or the like.

"It is desirable to provide a solid-state imaging device which is capable of reducing a transfer voltage and preventing dark current generated from the interface of a semiconductor region. Further, it is desirable to provide a method of manufacturing such a solid-state imaging device and an imaging apparatus provided with the solid-state imaging device.

"According to an embodiment of the present invention, there is provided a solid-state imaging device. The solid-state imaging device includes: a semiconductor substrate; a first conductive region of the semiconductor substrate; a first conductive region located on an upper surface side of the first conductive region of the semiconductor substrate; a second conductive region located below the first conductive region located on the upper surface side of the first conductive region of the semiconductor substrate. Further, the solid-state imaging device includes a photoelectric conversion region including the first conductive region located on the upper surface side of the first conductive region of the semiconductor substrate and the second conductive region. Furthermore, the solid-state imaging device includes a transfer transistor transferring charges accumulated in the photoelectric conversion region to a readout region. The first conductive region, which is included in the photoelectric conversion region, extends to the lower side of a sidewall of a gate electrode of the transfer transistor. A pixel including the photoelectric conversion region and the transfer transistor is provided in the solid-state imaging device.

"According to another embodiment of the present invention, there is provided an imaging apparatus including a solid-state imaging device, an imaging optical unit, and a signal processing unit. The solid-state imaging device includes an imaging region with a pixel having a photoelectric conversion region, a transfer transistor, and a readout region on a semiconductor substrate. Further, the solid-state imaging device includes a first conductive region of the semiconductor substrate, a first conductive region located on an upper surface side of the first conductive region of the semiconductor substrate, a second conductive region located below the first conductive region located on the upper surface side of the first conductive region of the semiconductor substrate. The photoelectric conversion region includes the first conductive region located on the upper surface side of the first conductive region of the semiconductor substrate and the second conductive region. The transfer transistor transfers charges accumulated in the photoelectric conversion region to the readout region. The first conductive region, which is included in the photoelectric conversion region, extends to the lower side of a sidewall of a gate electrode of the transfer transistor. The imaging optical unit is provided for introducing light from an imaging subject into the solid-state imaging device. The signal processing unit is provided for processing signals of an image captured by the solid-state imaging device.

"According to further embodiment of the present invention, there is provided a method of manufacturing a solid-state imaging device. The method includes the steps of: forming a gate electrode in a first conductive region of a semiconductor substrate on the semiconductor substrate through an insulating film, forming a second conductive region on the surface of the semiconductor substrate at an end of the gate electrode, forming a semiconductor layer on the second conductive region by selective epitaxial growth to form a first conductive region, and forming a sidewall of the gate electrode on the first conductive region formed by the selective epitaxial growth.

"In the solid-state imaging device and the imaging apparatus according to the embodiments of the present invention, the first conductive region of the photoelectric conversion region is extended on the upper surface side of the semiconductor substrate to the lower portion of the sidewall of the gate electrode. Therefore, the whole surface of the photoelectric conversion region can be covered with the first conductive region, thereby preventing the generation of dark current due to the presence of the interface of the semiconductor substrate on the photoelectric conversion region.

"In addition, the photoelectric conversion region is formed on the surface of the semiconductor substrate and the first conductive region is formed on the semiconductor substrate. With such a structure, the photoelectric conversion region in which charges are accumulated is formed in a shallow portion of the semiconductor substrate. Therefore, a voltage applied to the gate electrode when transferring the charges accumulated in the photoelectric conversion region to the readout region can be reduced.

"In addition, according to the method of manufacturing a solid-state imaging device in accordance with an embodiment of the present invention, the first conductive region is formed on the semiconductor layer formed on the photoelectric conversion region by selective epitaxial growth. Thus, the generation of dark current due to the presence of the interface of the semiconductor substrate on the photoelectric conversion region can be prevented. In addition, the photoelectric conversion region is formed on the surface of the semiconductor substrate, so that charges accumulated by photoelectric conversion can be allowed to be accumulated near the surface of the semiconductor substrate. Thus, the transfer of charges to the readout region can be easily carried out.

"According to the embodiments of the present invention, transfer voltage can be reduced and dark current generated from the interface of the semiconductor substrate can be suppressed.

BRIEF DESCRIPTION OF THE DRAWINGS

"FIG. 1 is a schematic cross-sectional diagram illustrating a transfer transistor of a solid-state imaging device according to the related art.

"FIG. 2 is a schematic diagram illustrating a solid-state imaging device according to an embodiment of the present invention.

"FIG. 3 is a cross sectional diagram illustrating main parts of the solid-state imaging device according to an embodiment of the present invention.

"FIGS. 4A to 4C are cross sectional diagrams illustrating the process of manufacturing a solid-state imaging device according to an embodiment of the present invention, wherein

"FIGS. 4A to 4C correspond to the steps of the process, respectively.

"FIGS. 5A to 5C are cross sectional diagram illustrating the process of manufacturing a solid-state imaging device according to an embodiment of the present invention, wherein FIGS. 5A to 5C correspond to the steps of the process, respectively.

"FIGS. 6A to 6C are cross sectional diagrams illustrating the process of manufacturing a solid-state imaging device according to an embodiment of the present invention, wherein FIGS. 6A to 6C correspond to the steps of the process, respectively.

"FIGS. 7A and 7B are cross sectional diagrams illustrating the process of manufacturing a solid-state imaging device according to an embodiment of the present invention, wherein FIGS. 7A and 7B correspond to the steps of the process, respectively.

"FIG. 8 is a block diagram illustrating an imaging apparatus according to an embodiment of the present invention."

For additional information on this patent application, see: Mabuchi, Keiji. Solid-State Imaging Device, Manufacturing Method Thereof, and Camera with Alternately Arranged Pixel Combinations. Filed September 5, 2013 and posted January 16, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=4774&p=96&f=G&l=50&d=PG01&S1=20140109.PD.&OS=PD/20140109&RS=PD/20140109

Keywords for this news article include: Electronics, High Voltage, Semiconductor, Sony Corporation, Signal Processing.

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Source: Electronics Newsweekly


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