No assignee for this patent application has been made.
News editors obtained the following quote from the background information supplied by the inventors: "The present invention relates to an imaging device like a CMOS image sensor, and a camera system.
"Recently, CMOS image sensors have widely been used in digital still cameras, camcorders, monitor cameras, etc., and the market for the CMOS image sensors has expanded.
"Each pixel in a CMOS image sensor converts input light to electrons using a photodiode which is a photoelectric converting device, stores the electron for a given period, and then outputs a signal reflecting the amount of stored charges to an analog-digital (AD) converter incorporated in a chip. The AD converter digitizes the signal to be sent outside.
"The CMOS image sensor has such imaging pixels laid out in a matrix form.
"FIG. 1 is a diagram showing the typical chip configuration of a CMOS image sensor 10 which is a solid-state imaging device.
"This CMOS image sensor 10 has a pixel array section 11, a row drive circuit 12, an AD converter 13, a switch 14, an output circuit 15, a row control line 16, a vertical signal line 17, and a transfer line 18.
"The pixel array section 11 has a plurality of pixels PX laid out in a matrix form in the row direction and in the column direction. The vertical signal line 17 is shared by a plurality of pixels PX aligned in the row direction, and is connected to the AD converter 13 arranged in association with each column.
"The row drive circuit 12 selects only one of a plurality of rows, and enables the row control line 16 to read stored charges from the pixels PX row by row.
"The row control line 16 is formed by a single control line or a plurality of control lines to read stored charges from such pixels, or reset the pixels row by row.
"Resetting herein means an operation of discharging stored charges from the pixels to set back the pixels to the state before exposure, and is executed as a shutter operation immediately after reading each row of pixels or at the time of initiating exposure.
"At the time of reading stored charges, analog signals transferred to the AD converter 13 via the vertical signal line are converted to digital signals, which are in turn sequentially transferred to the output circuit 15 via the switch 14 to be output to an image processing apparatus (not shown) located inside or outside the chip.
"When reading one row of pixels is completed in the CMOS image sensor 10, a next row is selected, and similar charge reading, AD conversion, and signal outputting are repeated. The completion of the processes on all the rows completes the outputting of one frame of image data.
"A hold circuit or a latch may be provided somewhere before the output stage to pipeline the charge reading, AD conversion, and signal outputting, but the CMOS image sensor is still unable to execute more than one row of image data.
"The time needed to finish processing every row of data defines the upper limit of the frame rate of dynamic images.
"JP-A-2002-44527 (Patent Document 1) and JP-A-2006-49361 (Patent Document 2) have proposed an image sensor which has a laminate of pixels and AD converters.
"FIG. 2 is a conceptual diagram of a CMOS image sensor 10A which has a laminate of pixels and AD converters.
"To help understand the concept, same reference numerals are given to the same components as shown in FIG. 1.
"The CMOS image sensor 10A in FIG. 2 has pixels PX and AD converters 13 respectively arranged on different semiconductor substrates in an array. The two semiconductor substrates are laminated one on the other, with each pixel connected to the respective AD converter by an analog signal line 17.
"The use of such an architecture can ensure reading charges from multiple rows of pixels at a time, and parallel execution of AD conversion row by row.
"The data after conversion is temporarily transferred to a memory 19 to be transferred to an image processing apparatus (not shown) located inside or outside the chip.
"The adoption of such a laminate structure can dramatically improve the imaging speed at least in the imaging chip, thereby ensuring ultrafast frame imaging.
"Further, development of a high-precision wafer adhering technique has lately attracted considerable attention. For example, JP-A-2007-234725 (Patent Document 3) and JP-A-2006-191081 (Patent Document 4) describe a technique of adhering a back-irradiation type image sensor and a circuit-mounted substrate opposite to each other, and transfer signals therebetween via a metal pad.
"This technique makes it possible to prepare a laminate structure as shown in FIG. 2 in the wafer-level fabrication, and connect pixels to AD converters without implementing bump connection for each chip.
"Since this technique allows individual chips to be cut out after the wafer-level fabrication, it is suitable for microprocessing and is considerably inexpensive.
"JP-A-7-67043 (Patent Document 5) has proposed a new scheme of counting photons in a time-divisional manner.
"According to the counting scheme, binary decision on the presence/absence of a photon input to a photodiode in a given period is repeatedly performed multiple times, and the decision results are integrated to acquire two-dimensional imaged data.
"That is, signals from the photodiode in the given period are sensed, and a counter connected to each pixel is counted up by 1, regardless of the number of input photons when the number of photons input in that period is equal to or greater than 1.
"If the frequency of photon inputs is random along the time axis, the actual number of photons input and the count number are conform to the Poisson distribution, so that the numbers have a substantially linear relation when the incident frequency is low, and can be corrected in any case when the incident frequency is high.
"Since the image sensor using such time-divisional photon counting treats data output from the pixels always as digital data, random noise or fixed nose originated from transmission and amplification of analog signals do not occur.
"At this time, it is only the photo shot noise and dark current generated in the pixels that remain, and a very high S/N ratio can be acquired particularly in imaging with low illuminance."
As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventor's summary information for this patent application: "The use of the structure in FIG. 2 can allow signals to be read out from the pixel array section fast in parallel and be subjected to AD conversion before being stored as data in the memory.
"However, significant difficulties still remain in digitizing the data and making the best use of the imaged data stored in the memory 19.
"First, when a vast amount of data acquired at the frame rate several ten times faster is transferred outside as it is, the transfer interface and the chip for the subsequent image processing become very expensive. If the frame rate is merely increased considerably over the sensing ability of eyes, application of the image sensor is limited.
"Therefore, it is desirable to take some new measures to add useful effects including an improvement of the image quality, if possible, in the imaging chip and output data of a band width which does not differ much from that in the normal case by applying such ultrafast imaging.
"However, Patent Document 2 hardly states data processing following memory storage.
"In the literature cited in the description of the embodiment in Patent Document 1, the fast reading performance is applied to achievement of 'Sigma-Delta' based AD conversion.
"However, this scheme makes it difficult to compensate for a variation in characteristics of individual AD converters, and achievement of such AD conversion should not necessarily improve the image quality.
"In general, the normal image sensor outputs an analog signal, photoelectrically converted by a pixel, and subjects the analog signal to AD conversion, so that various kinds of noise are mixed in the process of transmitting analog data and the process of converting the analog data to digital data.
"Configuration of a normal image sensor to have a laminate structure needs analog signal connection between the substrates.
"However, as compared with connection within the same substrate, the connection between substrates is accompanied by a larger variation in impedance, parasitic capacitance, etc., which may generate extra noise.
"Patent Documents 5 and 6 have proposed imaging devices which use photon counting.
"Such an imaging device receives outputs from pixels directly in the digital form, so that it is possible to completely eliminate random noise or fixed noise originated from analog signal processing which is inevitable in the normal image sensor. This leads to a potentially very high S/N ratio.
"Since photon counting needs extremely fast reading, however, the imaging devices disclosed in those two patent documents have digital decision functions provided in the individual pixels, and provided on the same substrate where the light receiving devices are disposed.
"For example, a counter is needed for each pixel in Patent Document 5.
"In Patent Document 6 which has achieved miniaturization of pixels, the pixels individually need 1-bit memories which are disposed planarly along with the light receiving devices.
"In addition, the circuit which is called '1-bit memory' needs to also have a signal decision function, and needs more complex control and more circuit elements than a simple latch.
"This makes the number of apertures of pixels very small, so that sufficient sensitivity cannot be obtained. In addition, a counter, located outside the pixel array though, is provided for each pixel.
"According to the technique proposed in Patent Document 5, the number of photons that can actually be sensed is defined by the total number of readout decisions in one frame period to form a single image in imaging using time-divisional photon counting.
"When a 12-bit output is acquired in 4095 decisions on photon inputs, for example, the actual number of sensible photons is equal to or less than the former number, and the square root of that number becomes photo shot noise which occurs at random for each frame.
"In case of imaging with low illuminance, the total number of photons input to a pixel in one frame period is, for example, 200 most of which is actually counted without any problem. Therefore, the S/N ratio of the photo shot noise becomes about the same as that of the analog sensor in the related art, which makes the time-divisional photon counting advantageous over the related art for it is free of analog transmission noise significantly larger than the photo shot noise.
"In case of imaging with high illuminance, on the other hand, and analog sensor whose photodiode stores 10,000 electrons, for example, can count that quantity of electrons at a maximum.
"At this time, the photo shot noise is 100 e-rms, and the S/N ratio becomes 100 times (40 dB) greater. The time-divisional photon counting cannot count about 1,600 electrons if a linear region is used in consideration of the precision.
"At this time, the photo shot noise is 40 e-rms, and the S/N ratio obtained is 40 times (32 dB) greater.
"In case of a full digital imager which uses time-divisional photon counting, therefore, the total number of counts needs to be increased in order to improve the S/N ratio of imaging with high illuminance.
"However, the total number of counts is restricted by the time of reading data from the pixels at the time of making a decision on photon inputs.
"While reading pixel data is the detection of a minute single photon signal, random noise of the sensing circuit increases as the reading becomes faster. Therefore, an increase in readout error ratio limits the data readout time.
"Suppose that data reading needs 400 nanoseconds. Normally, the reading operation of an imager is destructive reading, so that a pixel in reading cannot store charges (charge storage being equivalent to exposure).
"To secure the exposure time which is, for example, 90 percent of the frame period, therefore, the cycle time of decision which is the sum of the exposure time and the readout period needs to be 4 microseconds.
"Provided that one frame period is 1/60 second, the then maximum number of counts in decision reaches as high as 4,166. This number is insufficient to secure a high S/N ratio at the time of high illuminance.
"It is therefore desirable to provide an imaging device and a camera system which eliminate the need for handling analog signals to cancel out circuit noise originated from an AD converter and handling analog signals, without reducing the number of apertures of pixels, thereby improving the imaging performance at a low cost.
"It is also desirable to provide an imaging device and a camera system which optimize the setting of exposure when time-divisional photon counting is used.
"According to one embodiment of the invention, there is provided imaging device including a pixel array section having an array of pixels each of which has a photoelectric converting device and outputs an electric signal according to an input photon, a sense circuit section having a plurality of sensor circuits each of which makes binary decision on whether there is a photon input to a pixel in a predetermined period upon reception of the electric signal therefrom, and a decision result IC section which integrates decision results from the sense circuits, pixel by pixel or for each group of pixels, multiple times to generate imaged data with a gradation, the decision result IC section including a count circuit which performs a count process to integrate the decision results from the sense circuits, and a memory for storing a counting result for each pixel from the count circuit, the plurality of sense circuits sharing the count circuit for integrating the decision results.
"According to another embodiment of the invention, there is provided a camera system having an imaging device, an optical system which forms an image of a subject onto the imaging device, and a signal processing circuit which processes an output image signal from the imaging device, the imaging device including a pixel array section having an array of pixels each of which has a photoelectric converting device and outputs an electric signal according to an input photon, a sense circuit section having a plurality of sensor circuits each of which makes binary decision on whether there is a photon input to a pixel in a predetermined period upon reception of the electric signal therefrom, and a decision result IC section which integrates decision results from the sense circuits, pixel by pixel or for each group of pixels, multiple times to generate imaged data with a gradation, the decision result IC section including a count circuit which performs a count process to integrate the decision results from the sense circuits, and a memory for storing a counting result for each pixel from the count circuit, the plurality of sense circuits sharing the count circuit for integrating the decision results.
"The embodiments of the invention can eliminate handling of analog signals to cancel out circuit noise originated from an AD converter and handling analog signals, without reducing the number of apertures of pixels, thereby improving the imaging performance at a low cost.
"It is also possible to optimize the setting of exposure when time-divisional photon counting is used.
BRIEF DESCRIPTION OF THE DRAWINGS
"FIG. 1 is a diagram showing the typical chip configuration of a CMOS image sensor which is a solid-state imaging device;
"FIG. 2 is a conceptual diagram of a CMOS image sensor which has a laminate of pixels and AD converters;
"FIG. 3 is a diagram showing an example of the configuration of a CMOS image sensor (imaging device) according to a first embodiment of the present invention;
"FIG. 4 is a diagram showing one example of the circuit configuration of a pixel according to the first embodiment;
"FIG. 5 is a diagram illustrating a first example of access procedures according to the first embodiment;
"FIG. 6 is a diagram illustrating a second example of access procedures according to the first embodiment;
"FIGS. 7A to 7C are diagrams illustrating more concrete examples of the access procedures in FIG. 6;
"FIG. 8 is a diagram showing an example of the configuration of a CMOS image sensor (imaging device) according to a second embodiment of the invention;
"FIG. 9 is a diagram for explaining a cyclic access to pixel blocks according to the second embodiment;
"FIG. 10 is a diagram showing the general image of a chip in according to the second embodiment shown in FIG. 8;
"FIG. 11 is a circuit diagram showing one example of a sense circuit having a self-referring function;
"FIGS. 12A to 12F present a timing chart for explaining an example of a reading operation using the sense circuit with the self-referring function in FIG. 11 referring to the pixel in FIG. 4 by way of example;
"FIG. 13 is a diagram showing an example of the configuration of the pixel block corresponding to the second embodiment using an internal amplified diode;
"FIG. 14 is a diagram showing one example of the cross section of a CMOS image sensor which employs a coupling-capacitance based connection structure via a capacitor;
"FIG. 15 is a circuit diagram showing one example of a sense circuit with a self-referring function in the CMOS image sensor which employs the coupling-capacitance based connection structure via a capacitor;
"FIG. 16 is a diagram showing an example of the configuration of a CMOS image sensor (imaging device) according to a third embodiment of the invention;
"FIG. 17 is a diagram illustrating the flow of an imaged data process at high illuminance in the circuit in FIG. 16;
"FIG. 18 is a diagram illustrating the flow of an imaged data process at low illuminance in the circuit in FIG. 16;
"FIGS. 19A to 19D are diagrams showing the concept of cycle switching in the third embodiment;
"FIG. 20 is a diagram showing an example where the dynamic range of imaging is improved by carrying out counting cyclically with the combination of a long cycle period and a short cycle period; and
"FIG. 21 is a diagram showing one example of the configuration of a camera system to which a solid-state imaging device according to a fourth embodiment of the invention is adapted."
For additional information on this patent application, see: NISHIHARA, Toshiyuki. Imaging Device and Camera System Including Sense Circuits to Make Binary Decision. Filed
Keywords for this news article include: Patents, Electronics, Semiconductor, Signal Processing.
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