The patent's assignee for patent number 8629006 is
News editors obtained the following quote from the background information supplied by the inventors: "At present, large or very large integrated circuits can be application specific integrated circuits (ASICS) or field programmable gate arrays (FPGAs). ASICs are integrated circuit customized during manufacturing for a particular use while FPGAs are arrays of logic elements and interconnects that are configured and manufactured such that the logic functions and interconnects are programmable in the field after the FPGAs are manufactured. FPGAs allow the customer the flexibility of defining the configuration of the gate arrays after manufacturing to accommodate a variety of field conditions and applications. However, FPGAs are generally slower and the density of elements in the FPGAs is lower and thus they are generally more expensive than ASICs.
"Mask programmable gate arrays (MPGAs) are a form of ASIC that has become popular with the manufacturers. They have arrays of logic elements and other active components specified by the designer of the MPGA but the metallization layers i.e., the wire inter-connections between the elements or devices of the arrays are customized by a customer for a particular use and incorporated in the manufacturing of the MPGAs.
"Generally for MPGAs, structurally, the designer defines the circuit and logic elements, such as shift registers, embedded cpus, arithmetic units, and counters and the customer selects the desired functionalities, which then defines the interconnection layers, such as the metal wire and via layers to customize the design of the integrated circuit for the user's application. Until the customer-defined interconnections are made, the array of devices is uncommitted and devoid of functionality. Since the majority of the layers of the circuit uses stock designs from a designer/manufacturer, only a minimal number of photo-lithographic masks for the interconnect layers has to be custom designed and made. Therefore, an application specific MPGA for a customer can be manufactured less expensively and more rapidly than a fully customized ASIC where each layer of the circuit is customized designed and fabricated for a specific customer. However, MPGA has the limitation that the customer customization occurs at the design stage. Here, the designer can be a vendor of the MPGAs designing the MPGAs in accordance with customer provided specification.
"Existing designs of integrated circuits also do not allow a customer the flexibility of programming the input/out ports, either before or after manufacturing. This limits the capability and flexibility of the finished products.
"Due to the limitations of the prior art, it is therefore desirable to have architectures and processes for producing such architectures and fabricating integrated circuits that would provide the flexibility of FPGAs, and the convenience and low cost manufacturing features of MPGAs."
As a supplement to the background information on this patent, VerticalNews correspondents also obtained the inventors' summary information for this patent: "An object of this invention is to provide architectures for integrated circuits and methods for fabricating large or very large integrated circuits that allow a customer the flexibility to incorporate customer designs and specifications into the design of the integrated circuit, both before and after the manufacturing of the integrated circuit.
"Another object of this invention is to provide architectures for integrated circuits and methods for fabricating integrated circuits that are flexible yet inexpensive to manufacture.
"Briefly, the present invention provides architectures for hybrid integrated circuits and methods for fabricating these hybrid integrated circuits that contain both field programmable gate arrays and mask programmable gate arrays. Methods for fabricating an integrated circuit that is field programmable as well as mask programmable include the steps of: designing wafer bank layers and finishing layers, where the wafer bank layers provide a plurality of selectable functional blocks; fabricating said wafer bank layers; designing mask programmed interconnect layers for said integrated circuit, where the interconnect layers interconnect selected ones of the plurality of functional blocks from the wafer bank layers; fabricating the interconnect layers on the wafer bank layers; and fabricating the finishing layers on the interconnect layers to produce the integrated circuit. The architecture for these integrated circuits may include a field programmable gate array that is integrated with a mask programmable gate array in a ring structure.
"An advantage of this invention is that architectures for integrated circuits of this invention and methods to fabricate the integrated circuit of this invention allow a customer the flexibility to incorporate individual customized designs and specifications into the design of the integrated circuit, both before and after the manufacturing of the integrated circuit.
"Another advantage of this invention is that the integrated circuits of this invention and methods that produce the integrated circuit of this invention are flexible, yet inexpensive to manufacture."
For additional information on this patent, see: Winegarden, Steven; Nicholson, Ronald; Yu,
Keywords for this news article include:
Our reports deliver fact-based news of research and discoveries from around the world. Copyright 2014, NewsRx LLC
Most Popular Stories
- Obama, Ukraine Discuss Russian Incursion in Crimea
- Chinese May Have Spotted Malaysia Airlines Debris
- Social Media Causee Sleep Deprivation in Students
- First-time Jobless Claims Drop Unexpectedly
- General Electric Plans IPO of Credit Card Unit
- SXSW Crash Kills 2, Injures 23
- U.S. Business Inventories Up, Retail Sales Down
- 'Candy Crush' Maker Files IPO
- Banks Buying Little From Minority Firms: Study
- First-time U.S. Jobless Claims Hit 3-month Low