Patent number 8614145 is assigned to
The following quote was obtained by the news editors from the background information supplied by the inventors: "This invention relates generally to semiconductor or other electrical device fabrication, and more particularly, to fabrication of structures with through substrate vias, including semiconductor structures with through substrate vias, and other electrical devices, such as microelectromechanical systems (MEMS), manufactured on a substrate with through substrate vias.
"As semiconductor scaling faces difficulty at device dimensions approaching atomic scale, three-dimensional device integration offers a method for increasing density of semiconductor devices within a device. In three-dimensional integration, a plurality of semiconductor die or chips may be vertically stacked with electrical contacts disposed on both the active surfaces and the back surfaces of the chips so as to increase electrical interconnections between the stacked chips.
"Through substrate vias (TSVs) (or through silicon vias) facilitate, at least in part, this electrical interconnection. Typically, a through substrate via extends from the active surface or side (for example, from a line-level metal wiring structure on the front surface, which is typically a first metal wiring level in a metal interconnect structure) to the back surface or side of the semiconductor die or chip. These through substrate vias provide electrical connection paths through the substrate of the semiconductor chip, for example, to facilitate electrically interconnecting a plurality of stacked semiconductor chips."
In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventor's summary information for this patent: "In one aspect, provided herein is a novel method for establishing one or more through substrate vias (TSVs) through a substrate. The method includes: forming at least one recess in a first side of a wafer; filling, at least partially, the at least one recess with a sacrificial material; thinning the wafer from a second side to reveal the at least one recess at least partially filled with the sacrificial material; removing, from the second side of the wafer, the sacrificial material from the at least one recess; and filling the at least one recess from the second side of the wafer with a conductive material to provide the at least one through substrate via.
"In another aspect, provided herein is a method of forming a structure which includes: forming at least one recess in a front-side of a wafer; filling, at least partially, the at least one recess with a sacrificial material; forming one or more devices at the front-side of the wafer; thinning the wafer from a back-side to reveal the at least one recess at least partially filled with the sacrificial material, the thinning being subsequent to the forming of the one or more devices at the front-side of the wafer; removing, from the back-side of the wafer, the sacrificial material from the at least one recess; and filling the at least one recess from the back-side of the wafer with a conductive material to provide at least one through substrate via (TSV) through the wafer.
"Additional features and advantages are realized through the techniques of the present invention. Other embodiments and aspects of the invention are described in detail herein and are considered a part of the claimed invention."
URL and more information on this patent, see: Hummler, Klaus. through Substrate via Formation Processing Using Sacrificial Material. U.S. Patent Number 8614145, filed
Keywords for this news article include: Electronics,
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