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Patent Issued for Probe-Card Interposer Constructed Using Hexagonal Modules

January 22, 2014



By a News Reporter-Staff News Editor at Journal of Engineering -- Teradyne, Inc. (North Reading, MA) has been issued patent number 8622752, according to news reporting originating out of Alexandria, Virginia, by VerticalNews editors.

The patent's inventors are Parrish, Frank B. (Simi Valley, CA); Mellinger, Josh M. (Newbury Park, CA).

This patent was filed on April 13, 2011 and was published online on January 7, 2014.

From the background information supplied by the inventors, news correspondents obtained the following quote: "Probe-card interposers, also referred to herein as 'interposers,' are used as a component of an electronic testing system, also referred to herein as a 'tester.' The tester and interposer may be used for electrical testing of integrated circuits and/or integrated circuit devices. In general, the tester may generate a plurality of test signals that are routed through an interposer to specific contact points on integrated circuits or integrated devices. There may be an adapter, also referred to herein as a 'translator,' between the interposer and circuits or devices under test. The adapter may provide a spatial mapping for signal paths on the interposer to a distribution of probes on the translator that align to the contact points specific to the devices or circuits under test. An interposer can provide a separable connection between the tester and translator, so that different translators may be used on the testing system with different circuit and device layouts.

"In semiconductor manufacturing, it is generally economically advantageous to parallelize manufacturing steps for as many devices and/or circuits as possible. Accordingly, a reduction in device size and increase in wafer size beneficially results in a greater number of devices being produced with each manufacturing step. This can, however, place greater demands on the manufacturing equipment. In this regard for a tester, smaller devices can require a higher density of probes and probe circuitry in a fixed area and increase demands on alignment of probes to contact points. Large test areas may require the handling and management of a large number of signals in the tester. Reductions in device size and increase in wafer size can require interposers of larger size capable of handling a large number of test signals from the tester and response signals from the devices and circuits under test."

Supplementing the background information on this patent, VerticalNews reporters also obtained the inventors' summary information for this patent: "The inventors have recognized and appreciated that large interposers for testing large areas may be made with a high density of conductors at low cost compared to conventional approaches. The interposer may comprise modules of a small number of shapes that may be readily assembled into an interposer of a selected shape, e.g., a circle. The inventors have further recognized that the small number of shapes can be fabricated from a base shape and few shapes that are machined from the base shape. The base shape may be injection molded initially, e.g., molded in the shape of a hexagon. In some embodiments, the same base shape may be used for wafers of different sizes.

"According to some embodiments of the invention, an interposer comprises a plurality of modules, each module being in a shape selected from the following group: a first shape, a first portion of the first shape, and a second portion of the first shape. The plurality of modules, when assembled into the interposer, may substantially fill a circle circumscribing the interposer. As one example, the first shape may be a hexagon.

"In some embodiments, the interposer comprises a plurality of modules or blocks, each module or block being in a shape selected from a first shape or a portion of the first shape. The first shape may be a polygon having more than four sides.

"Embodiments also include an interposer block useful for making an interposer. The interposer block may comprise a hexagonally-shaped element comprising a first surface, a second surface, and six edge surfaces. The block may further include at least one alignment feature near a first apex of the hexagonally-shaped element for aligning the block in an interposer comprising a plurality of the hexagonally-shaped elements. The interposer block may further comprise a plurality of conductive structures distributed across the hexagonally-shaped element.

"A method for fabricating an interposer, according to one embodiment of the invention, include acts of forming a plurality of modules of a first shape; and machining a portion of the plurality of modules into not more than a second shape and a third shape. Further, the first shape, second shape, and optionally third shape are selected such that modules of the first, second, and optionally third shapes may be assembled to substantially fill a circle circumscribing the assembled modules. All shapes may have common alignment features, e.g., alignment features that are located in a substantially identical arrangement on each piece and at substantially identical locations with respect to a reference location or reference locations common to each piece. The filling of the circle may comprise covering an area of the circle that is greater than 90% in some embodiments, greater than 95% in some embodiments, and yet greater than 98% in some embodiments. In some alternative embodiments, more than three pieces may be used, wherein each piece is derived from a common first shape.

"The foregoing and other aspects, embodiments, and features of the present teachings can be more fully understood from the following description in conjunction with the accompanying drawings."

For the URL and additional information on this patent, see: Parrish, Frank B.; Mellinger, Josh M.. Probe-Card Interposer Constructed Using Hexagonal Modules. U.S. Patent Number 8622752, filed April 13, 2011, and published online on January 7, 2014. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=103&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=5128&f=G&l=50&co1=AND&d=PTXT&s1=20140107.PD.&OS=ISD/20140107&RS=ISD/20140107

Keywords for this news article include: Teradyne Inc.

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Source: Journal of Engineering


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