The patent's assignee for patent number 8627167 is
News editors obtained the following quote from the background information supplied by the inventors: "The present invention is directed to methods and apparatus for providing multi-layered coding for memory devices, and more particularly encoding and decoding data in multiple layers to efficiently maintain data integrity.
"Typically data storage systems store data in non-volatile memory devices, e.g., flash memory devices. Such memory devices, however, may be unreliable in some circumstances due to programming imperfections or defects that may cause errors in the stored information. For example, flash memory devices contain cells with statistically varying voltage threshold, which result in varying read-out current. Such variation in the read-out current reduces the margin between signal levels and may lead to read-out errors. Thus, correction schemes become critical for compensating for the read-out errors.
"Data may be stored and organized in memory devices, e.g., non-volatile memory devices, in a structured paradigm. The structured paradigm may be made up of multiple allocation units which may be the smallest element of data that includes, for example, 512 bytes of data. Each of these allocation units is typically referred to as a page of data. A group of these allocation units (i.e., pages of data) form a larger data packet of the structured paradigm and may be referred to as a data sector. Data sectors may include four pages of data. A data file may be spread across many data sectors or may reside in a fractional data sector occupying, for example, less than four pages of data. A processor or controller may retrieve data either in pages or sectors.
"Correction schemes, known as coding mechanisms, may include Cyclic Codes, among others, and may in some limited circumstances correct and/or detect errors in data read from memory devices using parity bits that are appended to the data stored in the memory. These correction schemes, however, may reduce the efficiency of the overall system because the correction schemes may compute parity bits across multi-page units (e.g., a data sector) and may therefore require large blocks of data (e.g., data sectors) to be read in order to perform the correction, thereby preventing the processor from reading the data one page at a time. Alternatively, if the CRC is performed on a page-by-page basis, the integrity of the data is reduced because less correction/detection is possible."
As a supplement to the background information on this patent, VerticalNews correspondents also obtained the inventors' summary information for this patent: "In accordance with the principles of the present invention, methods and apparatus are provided for providing multi-layered coding for memory devices.
"In some embodiments, a group of data may include individual portions of data. The individual portions of the group of data may initially be encoded jointly by a first layer encoder. The first layer encoder may be a systematic encoder such as a
"In some embodiments, the encoded data may be further encoded by a third layer of code or a channel encoder prior to being stored in the memory.
"A processor may request access to one of the portions of the group of data. The encoded portion, including the second layer and third layer (if applicable), may be retrieved from the memory and provided to the decoder. The decoder may decode initially the third layer if one exists and subsequently decode the second layer of code to recover the portion of data. If the second layer is decoded successfully, the recovered portion is provided to the requesting processor. This obviates the need to retrieve the entire encoded group of data to recover one of the portions of the group and thus makes the system more efficient.
"If, on the other hand, the second layer decoder fails, the remaining portions of the group, including the first layer of coding information, may be retrieved. The decoder may decode the third layer if one exists and subsequently decode the second layer of code to recover the remaining portions of data. Each of the recovered portions of data including the portion of data which the second layer decoder failed to decode are then combined with the first layer of code and decoded jointly using the first layer decoder. The first layer decoder outputs the recovered group of data and may provide the requested portion to the processor.
"Accordingly, the efficiency of the memory system is increased because the remaining portions of the group (which may not have been requested by a processor) are decoded using the first layer only when the second layer decoder fails to decode the requested portion of the group. Moreover, the data integrity is enhanced by using adding an additional layer of protection (e.g., the second layer of code) to the encoded data to increase the likelihood of data recovery."
For additional information on this patent, see: Yang, Xueshi; Burd, Gregory; Wu, Zining. Methods and Apparatus for Providing Multi-Layered Coding for Memory Devices. U.S. Patent Number 8627167, filed
Keywords for this news article include: Information Technology,
Our reports deliver fact-based news of research and discoveries from around the world. Copyright 2014, NewsRx LLC
Most Popular Stories
- FAA to Appeal Court Decision Allowing Commercial Drone Use
- Tesla's Alt-Energy Future Aims for Massive Lithium-Ion Battery Production
- New Chat App, Yik Yak, Causes Problems for Students
- Rand Paul Tops Presidential Straw Poll at Conservative PAC Conference
- Obama Meets with Ukraine Prime Minister Wednesday
- Gas Prices May Jump from Calif. Emissions Law
- Taco Bell Rings Up Breakfast Menu
- California Establishes Center for Coffee Study
- Visa, MasterCard Team Up to Focus on Payment Security
- Sunday Starts Daylight Saving Time