Silicon According to a release, ESRA improves the reliability and quality of semiconductors offered by Lattice.
"Lattice is focused on providing customers with the industry's lowest-power, lowest-density, lowest-cost programmable logic devices and full-chip ESD design validation is a critical part of protecting the integrity of our products," stated
"We are proud to have
SFT reported that ESRA provides a full-chip ESD analysis solution. It delivers extraction, simulation, analysis, and debugging capability in one integrated environment. Highlighted resistance and current density violations permit designers to perform layout corrections at any time in the design process.
Further, ESRA offers designers verification and optimization strategies to improve ESD protection. It allows designers to verify the full chip for ESD reliability; pinpoint areas susceptible to failure; work on pre- and post-LVS (Layout Versus Schematic) clean designs; handle CDM (Charged Device Model), MM (Machine Model) and HBM (Human Body Model) ESD events; and optimize ESD device area. F3D (Fast 3D) is used for fast 3D extraction, and R3D (Resistive 3D) is used for 3D extraction and analysis of large resistive structures. F3D are chosen for their nanometer and Analog Mixed Signal (A/MS) design verification accuracy, and R3D for analysis that leads to improvements in the reliability and efficiency of semiconductor power devices.
Target applications include SOC, memory, Analog Mixed Signal (A/ MS), image sensor, power device and high-speed designs.
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According to a release, ESRA improves the reliability and quality of semiconductors offered by Lattice.