No assignee for patent application serial number 407848 has been made.
News editors obtained the following quote from the background information supplied by the inventors: "This invention relates to memory in semiconductor devices. More particularly, the present invention relates to a system and method for operating memory cells requiring bipolar programming in a three-dimensional array.
"A central problem associated with present volatile and non-volatile memory devices is that peripheral circuitry provides a large area overhead on the semiconductor memory chip, which results in less space available for the memory cell array. For example, past solutions for implementing more efficient memory devices involved utilizing multiple semiconductor chips to fashion the memory device or stack bipolar memory cells on top of each other. These solutions, however, regularly experience problems with significant wiring.
"Nonvolatile memory solutions are a growing focus for the next generation of memory systems. Where present floating-gate transistor based non-volatile memories satisfy many current enterprise and consumer needs, exponential growth in the amount of digital data generated in the information industry requires next generation of semiconductor memories to increase memory densities while reducing cost."
As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "Floating-gate transistors are difficult and expensive to integrate into the vertical dimension. Resistive random-access memory (RRAM), phase change memory (PCM) and magnetoresistive random-access memory (MRAM) are two-terminal emerging memory technologies presenting new opportunities in integrating memory arrays into the vertical dimension. Integrating memory arrays into the vertical dimensions make possible sharing peripheral circuits of multiple layers of memory arrays on same substrate thus improving the memory area efficiency. In particular, RRAM and MRAM are bipolar programmable memories. Finding a memory design that allows for greater memory cell densities on a semiconductor chip will provide for improved memory array efficiency and reliability.
"Accordingly, one example aspect of the present invention is a decoding scheme for a bipolar memory cell array including a bidirectional access diode. The decoding scheme includes a column voltage switch. The column voltage switch includes a plurality of column voltages and an output electrically coupled to the bidirectional access diode. The column voltages include at least one write-one column voltage and at least one write-zero column voltage. The decoding scheme also includes a row voltage switch. The row voltage switch includes a plurality of row voltages and an output electrically coupled to the bidirectional access diode. The row voltages include at least one write-one row voltage and at least one write-zero row voltage. The decoding scheme further includes a column decoder electrically coupled to a select line of the column voltage switch and a row decoder electrically coupled to a select line of the row voltage switch. Additionally, the decoding scheme includes a write driver electrically coupled to the select lines of the row and column switches.
Most Popular Stories
- SpaceX's Satellite Launch Is 'Game-Changer'
- Reid Confident Congress to Pass Immigration Bill
- Maui Visitor Killed in Shark Attack
- Donors Abandon GOP Over Gun Stance
- Mexico: 'Extremely Dangerous' Radioactive Material Stolen
- CEOs More Optimistic About Economy, Hiring
- Climate Change Early Warning System Urged
- Private Sector Employment Surges by 215,000 Jobs
- Calif. Likes Christie, Says Tea Party's a Drag
- Newtown 911 Tapes Being Released Today