By Targeted News Service
ALEXANDRIA, Va., Aug. 24 -- Novellus Systems, Fremont, Calif., has been assigned a patent (8,513,124) developed by four co-inventors for a "copper electroplating process for uniform across wafer deposition and void free filling on semi-noble metal coated wafers." The co-inventors are Thomas A. Ponnuswamy, Sherwood, Ore., John H. Sukamto, Lake Oswego, Ore., Jonathan D. Reid, Sherwood, Ore., and Steven T. Mayer, Lake Oswego, Ore.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Disclosed are methods of depositing a copper seed layer to be used for subsequent electroplating a bulk-layer of copper thereon. A copper seed layer may be deposited with different processes, including CVD, PVD, and electroplating. With electroplating methods for depositing a copper seed layer, disclosed are methods for depositing a copper alloy seed layer, methods for depositing a copper seed layer on the semi-noble metal layer with a non-corrosive electrolyte, methods of treating the semi-noble metal layer that the copper seed layer is deposited on, and methods for promoting a more uniform copper seed layer deposition across a semiconductor wafer."
The patent application was filed on May 21, 2010 (12/785,205). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,513,124.PN.&OS=PN/8,513,124&RS=PN/8,513,124
Written by Kusum Sangma; edited by Anand Kumar.