"Apparatus and Method for Transferring a Data Signal Propagated along a Bidirectional Communication Path within a Data Processing Apparatus" in Patent Application Approval Process
Patent application serial number 368385 is assigned to The Regents of the
The following quote was obtained by the news editors from the background information supplied by the inventors: "The present invention relates to an apparatus and method for transferring a data signal propagated along a bidirectional communication path within a data processing apparatus.
"Bidirectional communication paths are often used in data processing systems. For example, such bidirectional communication paths may be used within interconnect structures that form an integral part of global communication networks in multiprocessor chips. Such bidirectional communication paths facilitate high bandwidth with low silicon overhead by eliminating the need for replicating unidirectional signal wires. Examples of interconnects using such bidirectional communication paths are described in the article by
"Conventional bidirectional communication paths typically include a series of repeaters distributed along the communication path in order to amplify the data as it is propagated along the communication path. Typically the repeater structures are based on duplication of unidirectional repeaters, one of which is selectively activated for signal propagation. An example of such a conventional repeater structure is illustrated in FIG. 1. As shown in FIG. 1, a bidirectional communication path is provided between a first processor core 10 and a second processor core 12, that communication path being separated into a series of bidirectional communication path portions 15 by the inclusion of a plurality of repeater circuits along the bidirectional communication path. In this example, each repeater circuit comprises a pair of inverters 20, 25, one of which is activated at any point in time dependent on the contents of an associated flip-flop 30. In particular, each flip-flop is controlled by a clock signal, and on the rising edge of the clock signal samples the enable signal presented to its input, that enable signal identifying which one of the inverters 20, 25 should be activated. Accordingly, if the first processor core 10 is to send a data signal to the second processor core 12, the enable signals will be set in order to cause the inverters 25 to be activated. Conversely, if the second processor core 12 is to send a data signal to the first processor core 10, the enable signals will be set in order to cause the inverters 20 to be activated.
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