The patent's assignee for patent application serial number 836212 is
News editors obtained the following quote from the background information supplied by the inventors: "The inventive concept relates to a semiconductor device, and more particularly, to a non-volatile memory device having a vertical structure and method of operating the same.
"Although electronic devices have become continually reduced in size, they are nevertheless required to process a large amount of data. Thus, in order to reduce size while maintaining or improving upon processing capabilities, non-volatile memory devices for use in such electronic devices need to be reduced in size while increasing the integration degree thereof. To this end, non-volatile memory devices having a vertical structure have been considered instead of those having a conventional flat structure. However, non-volatile memory devices having a vertical structure are complicated to manufacture and, thus, the reliability thereof tends to be lower than more conventional memory devices having a flat structure."
As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "In accordance with the present disclosure, provided is a non-volatile memory device having a vertical structure and a method of operating the same that can enhance the reliability of the memory device.
"In accordance with one aspect of the inventive concept, a method of operating a non-volatile memory device is provided. The method includes: applying a turn-on voltage to each of first and second string select transistors of a first NAND string; applying first and second voltages to third and fourth string select transistors of a second NAND string, respectively; and applying a high voltage to word lines connected with memory cells of the first and second NAND strings.
"The second voltage may have a level higher than the first voltage.
"The first voltage may have a level lower than a ground voltage.
"The second voltage may have a level lower than a threshold voltage of the fourth string select transistor.
"The third string select transistor may be connected between the fourth string select transistor and a bit line corresponding to the second NAND string.
"The method of operating the non-volatile memory device may further comprise: applying a second high voltage into dummy cells between the first to fourth string select transistors and the memory cells, wherein the second high voltage has a level lower than the high voltage.
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