The patent's assignee for patent number 8508036 is
News editors obtained the following quote from the background information supplied by the inventors: "The present invention relates to microelectronic packages used for microelectronic chip packaging, and methods for making microelectronic packages for microelectronic chip packaging.
"Semiconductor chips are commonly provided in packages that facilitate handling of the chip during manufacture and during mounting of the chip on an external substrate such as a circuit board, wiring board or other circuit panel. For example, many semiconductor chips are provided in packages suitable for surface mounting. Such packages which can be surface mounted can provide reduced thermal resistance as well as an extremely low electrical resistance between the chip and the package and wiring for external connection. Numerous packages of this general type have been proposed for various applications. Certain types of packages have been developed which utilize a microelectronic component having a flexible dielectric substrate having conductive traces disposed thereon. In such an arrangement, electrically conductive posts, pillars or other connection elements project from a surface of the flexible substrate. Each post is connected to a portion of one of the traces, the traces being arranged on the other surface of the flexible surface, and are configured to be connected with a chip.
"This type of microelectronic component has various applications and can be used in a number of different microelectronic package arrangements. As disclosed in certain preferred embodiments of U.S. patent application Ser. Nos. 11/014,439; 10/985,119; and 10/985,126, the disclosures of which are incorporated by reference herein, one such microelectronic package can include a microelectronic element such as a semiconductor chip and a microelectronic component comprising a flexible substrate spaced from and overlying a first face of the microelectronic element. Such a component can include a plurality of conductive posts extending from the flexible substrate and projecting away from the microelectronic element, at least some of the conductive posts being electrically interconnected with said microelectronic element. Additionally, such a package can include a plurality of support elements disposed between the microelectronic element and the substrate and supporting the flexible substrate over the microelectronic device.
"Despite these advances in the art of semiconductor package assemblies and existing hermetic packages, still further improvements in making microelectronic components would be desirable. A packaging method and device is needed to fabricate a compact, thin, and substantially hermetic package."
As a supplement to the background information on this patent, VerticalNews correspondents also obtained the inventors' summary information for this patent: "According to an aspect, a microelectronic package is provided. Preferably, the microelectronic package includes a dielectric layer having top and bottom surfaces, the dielectric layer having terminals exposed at at least one of the surfaces. In addition, the microelectronic package includes a metallic wall bonded to the dielectric layer and projecting upwardly from the top surface of the dielectric layer and surrounding a region of the top surface, a metallic lid bonded to the wall and extending over the region of the top surface so that the lid, the wall and the dielectric layer cooperatively define an enclosed space. Furthermore, a microelectronic element disposed within the space and electrically connected to the terminals.
"Another aspect is a method of making a microelectronic package. The method desirably comprises the step of providing a dielectric layer having top and bottom surfaces, terminals exposed at least one of the surfaces, and a wall projecting upwardly from the top surface. The method according to this aspect preferably also includes the step of mounting a microelectronic element over a region of the top surface surrounded by the dielectric layer and electrically connecting the microelectronic element to at least some of the terminals, and a further step of bonding a metallic lid to the wall so that the lid extends over the microelectronic element and the microelectronic element.
"A further aspect provides a method of making a microelectronic chip carrier. A method according to this aspect desirably includes providing a composite metallic plate including a base layer of a metal and a conductive layer; etching the base layer to form a wall; and etching the conductive layer to separate the conductive layer into individual conductive elements. The method most preferably further includes the step of uniting the conductive elements and wall with a dielectric layer so that the wall projects upwardly away from the dielectric layer and encircles a region of the dielectric layer, and so that the conductive elements are carried on the region of the dielectric layer encircled by the wall. For example, the step of uniting the conductive elements and the wall with the dielectric layer may include uniting the dielectric layer with the composite metallic plate after etching the conductive layer to separate the conductive layer into individual conductive elements, and before etching the base layer to form the wall. Alternatively, the step of uniting the conductive elements and the wall with the dielectric layer may be performed by uniting the dielectric layer with the composite metallic plate before etching the base layer to form the wall, and the step of etching the conductive layer to form the individual conductive elements may be performed during or after etching the base layer to form the wall.
"These and other features, and advantages, will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings. It is important to point out that the illustrations may not necessarily be drawn to scale, and that there may be other embodiments which are not specifically illustrated."
For additional information on this patent, see: Honer,
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