The patent's assignee for patent number 8507301 is
News editors obtained the following quote from the background information supplied by the inventors: "The present invention relates to a thin film transistor (TFT) array substrate, and more particularly, to a TFT array substrate capable of preventing pad corrosion as well as protecting a TFT without any passivation layer, and the fabrication method thereof.
"A liquid crystal display device (LCD) displays an image by controlling the light transmittance of liquid crystal (LC) using an electric field.
"The LCD drives liquid crystal using an electric field formed between a pixel electrode and a common electrode respectively disposed on an upper substrate and a lower substrate facing each other.
"The LCD has a TFT array substrate (lower array substrate) and a color filter array substrate (upper array substrate) facing each other, a spacer disposed between the two array substrates to maintain a cell gap, and liquid crystal filling the cell gap.
"The TFT array substrate includes signal lines, TFTs, and an alignment layer coated thereon to align the LC.
"The color filter array substrate includes a color filter for reproducing colors, a black matrix (BM) for preventing light leakage, and an alignment layer coated thereon for aligning the LC.
"In the LCD, as the TFT array substrate requires a semiconductor process and a plurality of mask processes, the manufacturing process thereof is complicated and thus the manufacturing cost increases.
"To solve this problem, it is desired to develop a TFT array substrate that reduces the number of mask processes.
"The reason for this is that one mask process may include many processes such as a thin film deposition process, a cleaning process, a photolithography process, an etching process, a photoresist stripping process, and an inspection process.
"Recently, a 4-mask process requiring one less mask process than a standard 5-mask process that was typical for a TFT array substrate has been developed.
"FIG. 1 is a plan view of a related art TFT array substrate fabricated using a 4-mask process, and FIG. 2 is a sectional view taken along line I-I' in FIG. 1.
"Referring to FIGS. 1 and 2, the related art TFT array substrate of a liquid crystal panel includes a lower substrate 1, a gate line 2, and a data line 4 formed on the lower substrate crossing each other with a gate insulating layer 12 in between, a TFT 30 formed at each crossing, a pixel electrode 22 formed in a pixel region defined by the crossing gate and data lines, a storage capacitor 40 formed at an overlapping area of the gate line 2 and a storage electrode 28, a gate pad 50 connected to the gate line 2, and a data pad 60 connected to the data line 4.
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