Patent number 8508048 is assigned to
The following quote was obtained by the news editors from the background information supplied by the inventors: "The present disclosure relates to a semiconductor device and a manufacturing method thereof, which is formed from a package which includes a semiconductor chip.
"In an electronic apparatus, a so-called PoP (Package on Package) structure is proposed (for example, refer to Pamphlet of International Publication No. WO 2006-082620 in FIG. 1) in which a plurality of packages including a semiconductor chip is laminated, in order to realize miniaturization of components which use a semiconductor chip.
"In the PoP structure, it has an advantage in which an area for mounting is reduced and a transmission path is short, compared to a structure in which a plurality of packages is aligned horizontally.
"In a PoP structure in the related art, connection between a lower package and an upper package is performed using solder balls or a wiring which is provided at the periphery of the semiconductor chip of the lower package.
"In this configuration, the upper package is necessary to be formed to a large size to correspond to a connection portion of the solder ball, or the like."
In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventor's summary information for this patent: "As described above, in the configuration in which the lower package and the upper package are connected using the solder balls or the wiring which is provided at the periphery of the semiconductor chip of the lower package, it is necessary to design the upper package according to a size of the lower package.
"For this reason, it is difficult to standardize the upper package, or to use an arbitrary package such as a general-purpose package as the upper package. In addition, when a new product is used in the lower package, it is necessary to newly develop the upper package according to the lower package, as well.
"Specifically, in a configuration in which the connection between the lower package and the upper package is performed using the solder ball, a size of the connection portion is determined by a pitch or a size of the solder ball.
"In order to secure a reliable connection in consideration of bending of the package, it is necessary for the solder ball to have the large pitch and size, and, accordingly, the external size of the package increases.
"In addition, if a size of the semiconductor chip in the upper package is smaller than that of the lower package, a distance between the semiconductor chip of the upper package and the connection portion with the lower package becomes long. In this case, it may be considered to connect the connection portion with the lower package, to the upper package, using a wiring layer which is formed in a relay board.
"For example, the connection may be performed such that a via hole which passes through from a pad of the substrate to an upper surface, is formed in the lower package, a conductive layer is embedded in the via hole, and the conductive layer and the upper package are connected using the wiring layer which is formed in the relay board.
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