The assignee for this patent application, patent application serial number 461921, is
Reporters obtained the following quote from the background information supplied by the inventors: "The instant disclosure relates to a manufacturing method of a random access memory capacitor; in particular, to a manufacturing method of a dynamic random access memory (DRAM) capacitor without a moat structure.
"Along with the minimization of the electronic products, the components of the semiconductor are also improved to be designed smaller. Meanwhile, the manufacturing process of semiconductors is also advancing rapidly which enables the semiconductor chips to attain stronger functions for the electronic products, such as a higher density, a higher efficiency, and lower power consumption. Nevertheless, conventional memory devices usually include a transistor, a capacitor, and a peripheral control circuit. Therefore, in order to achieve a higher efficiency for the memory devices, finding a way for more capacitors to be arranged within the very limited area shall be able to achieve the required effect.
"Please refer to FIG. 1, which shows a structure of a conventional memory capacitor. A semiconductor substrate 1 is defined with an array region A and a peripheral region P. A plurality of trenches 3 is formed on the array region A to divide an oxide layer 2, and each trench 3 is defined by at least one side surface and a base, and an insulating layer 4 is formed on the oxide layer 2. A conductive layer 5 is formed on the array region A, where the conductive layer 5 is formed particularly on the side surfaces and base of the trenches 3 and on the insulating layer 4. For the peripheral region P, the conductive layer 5 is formed on the insulating layer 4. The conductive layer 5 serves as an electrode for the capacitor. Furthermore, a moat 6 is formed between the array region A and the peripheral region P to separate the two. Since the oxide layers 2 of the array region A and the peripheral region P are made of the same material, the moat 6 is necessary to distinctly separate the two regions."
In addition to obtaining background information on this patent application, VerticalNews editors also obtained the inventors' summary information for this patent application: "The object of the instant disclosure is to provide a semiconductor structure without a moat structure to increase the amount of capacitors in the memory device. Specifically speaking, the area for disposing the capacitors is enlarged to accommodate more capacitors.
"The instant disclosure provides a manufacturing method of a memory capacitor without a moat structure. The method comprises the following steps: providing a semiconductor substrate defined with an array region and a peripheral region; forming a first oxidized layer on the array region; forming a second oxidized layer on the peripheral region; planarizing the first and the second oxidized layers to form an insulating layer on the first and the second oxidized layers; forming a plurality of trenches on the array region, where the trenches penetrate the first oxidized layer and the insulating layer on the first oxidized layer; forming a conductive layer on the inner and base surfaces of each trench; removing a portion of the conductive layer and a portion of the insulating layer to form a plurality of notches exposing the first oxidized layer; removing the first oxidized layers which are exposed from the notches to complete the manufacturing process of the memory capacitor without a moat.
Most Popular Stories
- Twitter Coming to Phones Without Internet
- Entravision Initiates Quarterly Cash Dividend
- Shanghai Smog Forces Factory Shutdowns
- NASA Fellowships, Scholarships Bring Diversity to Workforce
- Warner Bros. Unleashes 'Hobbit: Desolation of Smaug' Merchandise
- Amanda Bynes Enrolls in California's FIDM
- How to Arm Yourself Against CryptoLocker Virus
- Eagle Deaths OK'd for Wind Power
- Obamacare Doing Just Fine, Ky. Governor Says
- Dish Network Leads 2013 Top 50 Advertisers List