Working Group to Define Architecture Description Standard to Shrink
Software Tool Support Costs for Multicore/Manycore Processors
Multicore and manycore system development often gets sidetracked because development tool vendors and runtime systems for these programs are challenged to support the virtually unlimited number of processor configurations.
Unlike the IEEE IP-XACT standard that defines and describes electronic components for hardware design, the primary goal of the SHIM working group is to define an architecture description standard useful for software design. For example, the processor cores, the inter-core communication channels (in support of message passing protocols such as the Multicore Associationís MCAPI), the memory system (including hierarchy, topology, coherency, memory size, latency), the network-on-chip (NoC) and routing protocol, and hardware virtualization features are among the architectural features that SHIM will either directly or indirectly describe. The SHIM standard will be flexible enough to allow vendor-specific, non-standard architectural information for customized tools. And, while the SHIM standard itself will be publicly available, the vendor-specific information can remain confidential between a processor vendor and its development tool partners.
The Multicore Associationís SHIM standard will be beneficial for many types of tools, including performance estimation, system configuration, and hardware modeling. Performance information is critical for most software development tools, including performance analysis tools, auto-parallelizing compilers, and other parallelizing tools. Moreover, operating systems, middleware, and other runtime libraries require basic architectural information for system configuration. In addition, the SHIM standard can be used with hardware modeling to support architecture exploration. An important goal for SHIM is to align with work underway in the Multicore Associationís