Researchers Submit Patent Application, "Semiconductor Device, Semiconductor System Having the Same, and Command Address Setup/Hold Time Control Method Therefor", for Approval
The patent's assignee for patent application serial number 591156 is
News editors obtained the following quote from the background information supplied by the inventors: "In general, command/address signal may be applied to a semiconductor device such as a semiconductor memory device from a controller and it need to meet a setup/hold time specification. With the increase of the operating speed of the controller, various methods for the command/address signal to meet the setup/hold time specification are being researched.
"By checking a delay amount of the command/address signals occurring while the controller applies the command addresses to the semiconductor device, the controller performs an operation of controlling the setup/hold times of the command/address signals (hereinafter, referred to as a 'calibration operation'). The semiconductor device latches the command/address signals and outputs the latched command/address signals through data pads, and the controller is fed back with the command addresses which are outputted through the data pads.
"However, in the case where the number of the command/address signals is greater than the number of the data pads, the semiconductor device cannot output the command/address signals to the data pads. Accordingly, since the controller cannot be fed back with the command/address signals, the setup/hold times of the command addresses cannot be controlled."
As a supplement to the background information on this patent application, VerticalNews correspondents also obtained the inventors' summary information for this patent application: "An embodiment of the present invention relates to a semiconductor system which divisionally latches command/address signals and thereby can control setup/hold times of command/address signals even in the case where the number of the command/address signals is greater than the number of data pads.
"In an embodiment of the present invention, a semiconductor system includes: a controller configured to apply a clock enable signal, first to third command addresses, a chip select signal, first and second entry commands and an exit command, and receive an output signal; and a semiconductor device configured to latch the first and second command addresses and transfer the output signal in response to the chip select signal and the first entry command, latch the first and third command addresses and transfer the output signal in response to the chip select signal and the second entry command, and transfer data generated by the first to third command addresses as the output signal in response to the clock enable signal and the exit command signal.
"In an embodiment of the present invention, a semiconductor system includes: a signal generation block configured to generate a strobe signal, first and second calibration signals and a control signal in response to an internal clock, a clock enable signal, a chip select signal, first and second entry commands and an exit command; a latch block configured to latch a first command address in response to the strobe signal and generate a first latched command address; a selective latch block configured to latch a second or third command address in response to the strobe signal and the first and second calibration signals and generate a selectively latched command address; a read path circuit configured to be inputted with the first to third command addresses and generate data; and a multiplexer configured to transfer the data or the first latched command address and the selectively latched command address as an output signal in response to the control signal.
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