Patent number 8489804 is assigned to
The following quote was obtained by the news editors from the background information supplied by the inventors: "The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
"Solid-state drives (SSD) use solid-state memory to store data. Examples of solid state memory include static random access memory (SRAM), dynamic random access memory (DRAM), and flash memory. SSDs are less susceptible to mechanical failures compared to conventional hard disk drives. This is because SSDs do not include as many moving parts as conventional hard disk drives. Further, SSDs have a faster startup time than conventional hard disk drives. This is because, unlike conventional hard disk drives, SSDs do not have to wait for a disk to spin up to a particular speed before data can be read from or written to the disk.
"An SSD may include a plurality of NAND flash memory cells or DRAM memory cells. NAND flash memory may include single-level cell (SLC) flash or multi-level cell (MLC) flash. SLC flash stores a single bit of data per cell, and MLC flash stores store two or more bits of data per cell.
"Flash memory has a finite number of erase-write cycles. A controller coordinates read, write, and erase cycles of the flash memory. For example, the controller loads firmware to calculate or translate a logical memory address provided by a host to a physical address within the flash memory."
In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "A system includes a selection module, a control module, an erasing module, and a read/write module. The selection module is configured to select X of Y memory blocks (i) based on fullness of the X memory blocks and (ii) in response to a write command, where X and Y are integers greater than or equal to 1. The Y memory blocks are located in first memory. The control module is configured to store first data from the X memory blocks in second memory. The erasing module is configured to erase the first data from the X memory blocks. The read/write module is configured to write second data to the X memory blocks based on the write command.
"In another feature, the second memory comprises a dedicated portion having a size preselected to drive a write amplification for the first memory to one.
"In another feature, the selection module selects the X memory blocks with less fullness than non-selected ones of the Y memory blocks.
"In another feature, the first memory comprises non-volatile memory, and the second memory comprises volatile memory.
"In still other features, a method includes selecting X of Y memory blocks (i) based on fullness of the X memory blocks and (ii) in response to a write command. The Y memory blocks are located in first memory. X and Y are integers greater than or equal to 1. The method further includes storing first data from the X memory blocks in second memory, erasing the first data from the X memory blocks, and writing second data to the X memory blocks based on the write command.
"In another feature, the method further includes preselecting a size of a dedicated portion of the second memory to drive a write amplification for the first memory to one.
"In another feature, the method further includes selecting the X memory blocks with less fullness than non-selected ones of the Y memory blocks.
"In another feature, the first memory comprises non-volatile memory and the second memory comprises volatile memory.
"Further areas of applicability of the present disclosure will become apparent from the detailed description, the claims and the drawings. The detailed description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the disclosure."
URL and more information on this patent, see: Nguyen, Lau;
Keywords for this news article include: Electronics, Random Access Memory,
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