By a News Reporter-Staff News Editor at Electronics Newsweekly -- Investigators publish new report on Microprocessors and Microsystems. According to news reporting originating in Amherst, Massachusetts, by VerticalNews journalists, research stated, "As DRAM-based main memory becomes a dominant factor in the energy consumption and cost of any computer system, new non-volatile memory technologies have been proposed to replace DRAMs. For example, PRAM is emerged as a leading alternative for main memory technology."
The news reporters obtained a quote from the research from the University of Massachusetts, "However, the access latency of PRAM is significantly slower than that of DRAM and an interfacing converter is required to at least partly alleviate this latency difference. The interfacing converter sits between PRAM-based main memory and the last level of cache memory. In this paper, we present a proposed dynamic adaptive converter and its management scheme for PRAM-based main memory. In addition to overcoming long access latency, it provides enhanced endurance. The adaptive converter is composed of an aggressive streaming buffer to make better use of spatial locality by dynamically varying fetch size, a write buffer to improve endurance limit, and an adaptive filtering buffer to better utilize temporal locality. Our experimental results show that we can reduce buffer miss rate by about 59%, compared with using a single buffer structure with same space. Our approach also hides PRAM access latency more effectively. It improves the number of superblocks pre-fetched from main memory by 25%."
According to the news reporters, the research concluded: "Therefore, the converter shows its effectiveness comparable to a case with larger buffer space, without expending the extra power."
For more information on this research see: A dynamic adaptive converter and management for PRAM-based main memory. Microprocessors and Microsystems, 2013;37(6-7):554-561. Microprocessors and Microsystems can be contacted at: Elsevier Science Bv, PO Box 211, 1000 Ae Amsterdam, Netherlands. (Elsevier - www.elsevier.com; Microprocessors and Microsystems - www.elsevier.com/wps/product/cws_home/525449)
Our news correspondents report that additional information may be obtained by contacting I.S. Choi, University of Massachusetts, Dept. of Comp Sci, Amherst, MA 01003, United States. Additional authors for this research include S.I. Jang, C.H. Oh, C.C. Weems and S.D. Kim.
Keywords for this news article include: Amherst, Massachusetts, United States, North and Central America, Microprocessors and Microsystems
Our reports deliver fact-based news of research and discoveries from around the world. Copyright 2013, NewsRx LLC