Patent number 8564304 is assigned to
The following quote was obtained by the news editors from the background information supplied by the inventors: "This invention relates to integrated circuit device testing and, in particular embodiments, to testing MEMS devices having inertial (motion, acceleration, position) sensing capabilities.
"Conventional IC test devices include a socket body and a lid. The socket body has a cavity or nest in which a device to be tested can placed for testing. The lid has a pressure block that urges the device against test connectors at the bottom of the cavity when the lid is engaged with the socket body. In a so-called 'clamshell' configuration, the lid is hinged to the block. Clamps or clips may be employed to lock (engage) the lid with the block. A test procedure using such a conventional test socket entails many steps, some of them mechanically complex: a pick-and-place tool picks up an IC device and places it into the nest. The lid is placed over the socket body. The lid is engaged (locked) to the body. A testing cycle is carried out. The lid is disengaged (released) from the socket body. The lid is removed from the body. The pick-and-place tool removes the tested device from the cavity and sorts it according to whether it successfully qualified during the test cycle.
"Testing inertial sensing capabilities of a MEMS device, for example, requires that the MEMS device be movable during the testing cycle. Test apparatus for such devices must accordingly be capable of being moved (tilted, shaken, rotated) while the device being tested is secured in the apparatus.
"Costs associated with testing can constitute a considerable proportion (half or more, in some cases) of the cost of manufacture of qualified integrated circuit devices, and improving throughput in device testing sequences can significantly decrease testing costs."
In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "In general the invention features apparatus for testing integrated circuit devices. The apparatus includes a carrier and a frame. The carrier includes receptacles mounted on a generally planar test substrate, and each receptacle includes one or more cavities into which devices to be tested can be received. The cavities may be blind, that is, they each may have a floor including test contacts upon which the device rests; or the cavities may pass through the receptacles, so that the devices rest upon test contacts on the test substrate itself. The frame includes pins mounted to and projecting from a surface of a generally planar plate, and the plate has open areas, formed at the plate margin or as openings through the plate. To ready the apparatus for deployment in a test sequence, the frame and carrier are oriented so that the planes of the substrate and the plate are generally parallel and so that the pins project toward the substrate. The frame and carrier can be moved (displaced or rotated) relative to one another in an x-y plane (parallel to the substrate, for example); and they can be moved relative to one another in a z direction (perpendicular to the x-y plane). When ready for deployment the frame and carrier are situated far enough apart in the z direction so that when they are displaced relative to one another in an x-y direction the pins do not impinge on the receptacles (a 'shift position').
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