eASIC and Computer Simulation Technology (CST) to demonstrate up to 5x
reduction in co-simulation time for multi-level PCB package design
The solution focuses on PCB package co-design and provides accurate, effective decomposition and segmentation modeling techniques for PCB package systems co-simulation. The techniques allow accurate accounting of all discontinuities present at the package interface while saving significant computational effort and resources. The methodologies reduce co-simulation time by up to 5X when compared to the full model simulation, while preserving higher accuracy when compared to traditional partitioning practices.
eASIC is a fabless semiconductor company offering breakthrough single mask ASIC devices aimed at dramatically reducing the overall cost and time-to-production of customized semiconductor devices. Low-cost, high-performance and fast-turn ASIC and System-on-Chip designs are enabled through patented technology utilizing via-layer customizable routing. This innovative fabric allows eASIC to offer a new generation of ASICs with significantly lower up-front costs than traditional ASICs.
Privately held eASIC Corporation is headquartered in
eASIC and eASIC Nextreme are trademarks of eASIC Corporation and registered in the U.S. Patent and Trademark Office.
CST develops and markets high performance software for the simulation of electromagnetic fields in all frequency bands. Its success is based on the implementation of leading edge technology in a user- friendly interface. CST’s customers are market leaders in industries as diverse as Telecommunications, Defense, Automotive, Electronics, and Medical Equipment. Today CST employs 190 sales, development, and support personnel, and enjoys a leading position in the high frequency 3D EM simulation market. Further information about CST can be found at www.cst.com.
Source: eASIC Corporation