Patent number 8560980 is assigned to
The following quote was obtained by the news editors from the background information supplied by the inventors: "A task in manufacturing chip testing is to determine whether a chip should be accepted or discarded, i.e., chip disposition, by measuring a set of surrogate metrics from the chip. The accepted chip is assumed to have its target metrics meeting the customer specification. If the assumption is mistaken, there is a risk of shipping 'bad' chips to customers, thus increasing the cost of contracted product quality loss (PQL)."
In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "Principles of the invention provide techniques for optimal chip acceptance criterion and its applications. In one aspect, an exemplary method includes the steps of identifying, for an integrated circuit chip design for which manufacturing chip testing is to be optimized, at least one target metric; identifying, for the integrated circuit chip design for which manufacturing chip testing is to be optimized, at least one surrogate metric; modeling a relationship between the at least one target metric and the at least one surrogate metric using a general joint probability density function; and determining a chip disposition criterion based on the general joint probability density function. The chip disposition criterion determines, for a given physical chip putatively manufactured in accordance with the design, based on the at least one surrogate metric for the given physical chip, whether the given physical chip is to be accepted or discarded during the manufacturing chip testing.
"As used herein, 'facilitating' an action includes performing the action, making the action easier, helping to carry the action out, or causing the action to be performed. Thus, by way of example and not limitation, instructions executing on one processor might facilitate an action carried out by instructions executing on a remote processor, by sending appropriate data or commands to cause or aid the action to be performed. For the avoidance of doubt, where an actor facilitates an action by other than performing the action, the action is nevertheless performed by some entity or combination of entities.
"One or more embodiments of the invention or elements thereof can be implemented in the form of a computer product including a computer readable storage medium with computer usable program code for performing the method steps indicated (or for obtaining the target and/or surrogate metric(s) identified by a human agent or the like). Furthermore, one or more embodiments of the invention or elements thereof can be implemented in the form of a system (or apparatus) including a memory, and at least one processor that is coupled to the memory and operative to perform exemplary method steps (or for obtaining the target and/or surrogate metric(s) identified by a human agent or the like). Yet further, in another aspect, one or more embodiments of the invention or elements thereof can be implemented in the form of means for carrying out one or more of the method steps described herein (or for obtaining the target and/or surrogate metric(s) identified by a human agent or the like); the means can include (i) hardware module(s), (ii) software module(s), or (iii) a combination of hardware and software modules; any of (i)-(iii) implement the specific techniques set forth herein, and the software modules are stored in a computer-readable storage medium (or multiple such media).
"Techniques of the present invention can provide substantial beneficial technical effects. For example, one or more embodiments may provide one or more of the following advantages: Smooth tradeoff between yield and product quality level through adjusting parameters used in different problem formulations, such as maximize yield subject to contracted product quality loss; or minimize product quality loss subject to given yield constraints. Theoretically proved optimal chip disposition criteria for any probability distributions between chip target metrics and measured surrogate metrics Efficient close-form solution for optimal chip disposition based on Gaussian distributions between chip target metrics and measured surrogate metrics
"These and other features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings."
URL and more information on this patent, see: Xiong, Jinjun; Zolotov, Vladimir. Optimal Chip Acceptance Criterion and Its Applications. U.S. Patent Number 8560980, filed
Keywords for this news article include: Software,
Our reports deliver fact-based news of research and discoveries from around the world. Copyright 2013, NewsRx LLC
Most Popular Stories
- Nelson Mandela Dies After Momentous Life
- Twitter Names Woman to Board
- NSA Tracks 5 Billion Cellphone Records a Day
- Nelson Mandela Dead at 95
- Pope Francis Says He'll Fight Child Sex Abuse
- Yemen Attack Kills 52
- Fast-Food Workers Want $15 an Hour
- W.H. Corrects Itself on Unclegate
- Roybal-Allard Tours Gordon Brush Plant
- Aspen Contracting Adding 300 Jobs