Patent number 8541850 is assigned to
The following quote was obtained by the news editors from the background information supplied by the inventors: "Various microelectromechanical systems (MEMS) resonators exist. Conventional methods of coupling complementary metal-oxide-semiconductor (CMOS) circuitry to a MEMS resonator are limited, however, for a variety of reasons. Some MEMS resonators are formed on a first substrate that is later bonded or otherwise electrically coupled to a second CMOS substrate, which subjects the device to alignment issues, MEMS-to-CMOS gap limitations, and additional fabrication costs.
"Some other MEMS resonators are integrated directly with CMOS on the same wafer in a side-by-side configuration, meaning the MEMS resonator is typically coplanar with the CMOS or otherwise laterally displaced from the CMOS. Such side-by-side configurations, however, typically require additional die area on the wafer, thereby increasing fabrication costs and design constraints. In addition, conventional MEMS-CMOS monolithic processes typically involve basic, stripped-down CMOS flows that further limit design possibilities and the possible materials that may be effectively used for the MEMS resonator."
In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventors' summary information for this patent: "In accordance with one embodiment of the present disclosure, a semiconductor substrate includes complementary metal-oxide-semiconductor (CMOS) circuitry disposed outwardly from the semiconductor substrate. An electrode is disposed outwardly from the CMOS circuitry. The electrode is electrically coupled to the CMOS circuitry. A resonator is disposed outwardly from the electrode. The resonator is operable to oscillate at a resonance frequency in response to an electrostatic field propagated, at least in part, by the electrode.
"In accordance with another embodiment of the present disclosure, a method includes forming complementary metal-oxide-semiconductor (CMOS) circuitry outwardly from a substrate. The CMOS circuitry is capable of providing an electric signal that contributes to at least a portion of an electrostatic field. A sacrificial layer is formed outwardly from the CMOS circuitry. A resonator is formed outwardly from the sacrificial layer. At least a portion of the sacrificial layer disposed inwardly from the resonator is removed such that the resonator is operable to oscillate at a resonance frequency at least partially in response to the electrostatic field.
"The example embodiments disclosed herein may provide any number of technical advantages and enhanced design possibilities. For example, some embodiments may enable a significantly higher density of resonators to be formed on a semiconductor substrate. Thus, various embodiments may allow for a higher density of resonator chips that may be produced on a single wafer. In addition, a particular semiconductor device may include one or more arrays of tens, hundreds, thousands, hundreds of thousands, or even millions of resonators. Increasing the available number of resonators in a given device may advantageously affect signal to noise ratio or impedance matching. Some embodiments may include multiple resonators tuned to different resonant frequencies. The combined effect of such resonators tuned to different respective frequencies may enable the design of a highly complex frequency response having an extremely high quality factor.
"In addition, various embodiments may enable the fabrication of resonators and corresponding electrodes within extremely close and well controlled proximity to each other. For example, in some embodiments the resonator-to-electrode gap may be less than 100 nanometers, thereby dramatically reducing parasitics.
"Various embodiments may further provide enhanced low-cost solutions. Unlike some conventional approaches, the electrical and/or mechanical coupling of resonators to electrodes may be effected without necessarily needing to combine separately processed substrates or to perform costly wire bonding.
"Other technical advantages of the present disclosure will be readily apparent to one skilled in the art from the following figures, descriptions, and claims. Moreover, while specific advantages have been enumerated above, various embodiments may include all, some, or none of the enumerated advantages."
URL and more information on this patent, see: Gupta,
Keywords for this news article include: Electronics, Semiconductor,
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